
DS17485/DS17487
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EXTENDED CONTROL REGISTER 4B
MSB
LSB
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
ABE
E32K
CS
RCE
PRS
RIE
WIE
KSE
ABE - Auxiliary Battery Enable. This bit when written to a logic 1 will enable the V
BAUX pin for
extended functions.
E32K - Enable 32.768 kHz output. This bit when written to a logic 1 will enable the 32.768 kHz
oscillator frequency to be output on the SQW pin. E32K is set to a 1 when VCC is powered up.
CS - Crystal Select Bit. When CS is set to a 0, the oscillator is configured for operation with a crystal
that has a 6 pF specified load capacitance. When CS=1, the oscillator is configured for a 12.5 pF crystal.
CS is disabled in the DS17487 module and should be set to CS=0.
RCE - RAM Clear Enable bit. When set to a 1, this bit enables a low level on RCLR to clear all 114
bytes of user RAM. When RCE = 0, RCLR and the RAM clear function are disabled.
PRS - PAB Reset Select Bit. When set to a 0 the PWR pin will be set hi-Z when the DS17485 goes into
power fail. When set to a 1, the PWR pin will remain active upon entering power fail.
RIE - Ram Clear Interrupt Enable. When RIE is set to a 1, the IRQ pin will be driven low when a RAM
clear function is completed.
WIE - Wake-up Alarm Interrupt Enable. When V
CC voltage is absent and WIE is set to a 1, the PWR pin
will be driven active low when a wake-up condition occurs, causing the WF bit to be set to 1. When VCC
is then applied, the IRQ pin will also be driven low. If WIE is set while system power is applied, both
IRQ
and PWR will be driven low in response to WF being set to 1. When WIE is cleared to a 0, the WF
bit will have no effect on the PWR or IRQ pins.
KSE - Kickstart Interrupt Enable. When V
CC voltage is absent and KSE is set to a 1, the PWR pin will be
driven active low when a kickstart condition occurs ( KS pulsed low), causing the KF bit to be set to 1.
When VCC is then applied, the IRQ pin will also be driven low. If KSE is set to 1 while system power is
applied, both IRQ and PWR will be driven low in response to KF being set to 1. When KSE is cleared to
a 0, the KF bit will have no effect on the PWR or IRQ pins.