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參數(shù)資料
| 型號(hào)： | DS1391U-3+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/26頁 |
| 文件大小： | 0K |
| 描述： | IC RTC W/CHARGER 10-USOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 類型： | 時(shí)鐘/日歷 |
| 特點(diǎn)： | 警報(bào)器，閏年，方波輸出，涓流充電器 |
| 時(shí)間格式： | HH:MM:SS:hh（12/24 小時(shí)） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | SPI |
| 電源電壓： | 2.7 V ~ 3.3 V |
| 電壓 - 電源，電池： | 1.3 V ~ 3.7 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-µMAX |
| 包裝： | 帶卷 (TR) |
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DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs with
Trickle Charger
13
Maxim Integrated
Power Control
The power-control function is provided by a precise,
temperature-compensated voltage reference and a
comparator circuit that monitors the VCC level. The
device is fully accessible and data can be written and
read when VCC is greater than VPF. However, when
VCC falls below VPF, the internal clock registers are
blocked from any access. If VPF is less than VBACKUP,
the device power is switched from VCC to VBACKUP
when VCC drops below VPF. If VPF is greater than
VBACKUP, the device power is switched from VCC to
VBACKUP when VCC drops below VBACKUP.
Timekeeping operation and register data are main-
tained from the VBACKUP source until VCC is returned to
nominal levels (Table 1). After VCC returns above VPF,
read and write access is allowed after RST goes high
(Figure 5).
Oscillator Circuit
All five devices use an external 32.768kHz crystal. The
oscillator circuit does not require any external resistors
or capacitors to operate. Table 2 specifies several crys-
tal parameters for the external crystal. If a crystal is
used with the specified characteristics, the startup time
is usually less than one second.
Clock Accuracy
The accuracy of the clock is dependent upon the accu-
racy of the crystal and the accuracy of the match
between the capacitive load of the oscillator circuit and
the capacitive load for which the crystal was trimmed.
Additional error is added by crystal frequency drift
caused by temperature shifts. External circuit noise
coupled into the oscillator circuit can result in the clock
running fast. Figure 7 shows a typical PC board layout
for isolation of the crystal and oscillator from noise.
Refer to Application Note 58:
Crystal Considerations
with Maxim Real-Time Clocks for detailed information.
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
Nominal Frequency
fO
32.768
kHz
Series Resistance
ESR
55
k
Load Capacitance
CL
6pF
Table 2. Crystal Specifications*
*
The crystal, traces, and crystal input pins should be isolated
from RF generating signals. Refer to Application Note 58:
Crystal Considerations for Maxim Real-Time Clocks
for addi-
tional specifications.
SUPPLY
CONDITION
READ/WRITE
ACCESS)
POWERED BY
VCC < VPF,
VCC < VBACKUP
No
VBACKUP
VCC < VPF,
VCC > VBACKUP
No
VCC
VCC > VPF,
VCC < VBACKUP
Yes
VCC
VCC > VPF,
VCC > VBACKUP
Yes
VCC
Table 1. Power Control
LOCAL GROUND PLANE (LAYER 2)
CRYSTAL
GND
X2
X1
NOTE: AVOID ROUTING SIGNAL LINES
IN THE CROSSHATCHED AREA
(UPPER LEFT QUADRANT) OF
THE PACKAGE UNLESS THERE IS
A GROUND PLANE BETWEEN THE
SIGNAL LINE AND THE DEVICE PACKAGE.
Figure 7. Layout Example
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