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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | DS1391U-3+T&R |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋佹暩(sh霉)锛� | 26/26闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC RTC W/CHARGER 10-USOP |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 3,000 |
| 椤炲瀷锛� | 鏅傞悩/鏃ユ |
| 鐗归粸锛� | 璀﹀牨鍣�锛岄枏骞�锛屾柟娉㈣几鍑猴紝娑撴祦鍏呴浕鍣� |
| 鏅傞枔鏍煎紡锛� | HH:MM:SS:hh锛�12/24 灏忔檪锛� |
| 鏁�(sh霉)鎿�(j霉)鏍煎紡锛� | YY-MM-DD-dd |
| 鎺ュ彛锛� | SPI |
| 闆绘簮闆诲锛� | 2.7 V ~ 3.3 V |
| 闆诲 - 闆绘簮锛岄浕姹狅細 | 1.3 V ~ 3.7 V |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 10-TFSOP锛�10-MSOP锛�0.118"锛�3.00mm 瀵級 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 10-µMAX |
| 鍖呰锛� | 甯跺嵎 (TR) |
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DS1390鈥揇S1394
Low-Voltage SPI/3-Wire RTCs with
Trickle Charger
9
Maxim Integrated
CAPACITANCE
(TA = +25掳C)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Capacitance on All Input Pins
CIN
10
pF
Capacitance on All Output Pins
(High Impedance)
CIO
10
pF
WARNING: Negative undershoots below -0.3V while the part is in battery-backed mode can cause loss of data.
Note 1:
Limits at -40掳C are guaranteed by design and not production tested.
Note 2:
All voltages are referenced to ground.
Note 3:
The use of the 250
trickle-charge resistor is not allowed at VCC > 3.63V and should not be enabled. Use of the diode is
not recommended for VCC < 3.0V.
Note 4:
Measured at VCC = typ, VBACKUP = 0V, register 0Fh = A5h.
Note 5:
Measured at VCC = typ, VBACKUP = 0V, register 0Fh = A6h.
Note 6:
Measured at VCC = typ, VBACKUP = 0V, register 0Fh = A7h.
Note 7:
SCLK, DIN, CS on DS1390/DS1391/DS1394; SCLK, and CE on DS1392/DS1393.
Note 8:
DOUT, SQW/INT (DS1390/DS1393/DS1394), SQW, and INT (DS1392).
Note 9:
The RST pin has an internal 50k
(typ) pullup resistor to VCC.
Note 10: ICCA鈥擲CLK clocking at max frequency = 4MHz for 3V and 3.3V versions; 1MHz for 1.8V version; RST (DS1391/DS1393)
inactive. Outputs are open.
Note 11: Specified with bus inactive.
Note 12: Measured with a 32.768kHz crystal attached to X1 and X2. Typical values measured at +25掳C and 3.0VBACKUP.
Note 13: With 50pF load.
Note 14: Measured at VIH = 0.7 x VDD or VIL = 0.2 x VDD, 10ns rise/fall times.
Note 15: Measured at VOH = 0.7 x VDD or VOL = 0.2 x VDD. Measured from the 50% point of SCLK to the VOH minimum of SDO.
Note 16: The parameter tOSF is the time that the oscillator must be stopped for the OSF flag to be set over the voltage range of
0
鈮� VCC 鈮� VCC(MAX) and 1.3V 鈮� VBACKUP 鈮� 5.5V.
Note 17: This delay applies only if the oscillator is enabled and running. If the EOSC bit is 1, the startup time of the oscillator is
added to this delay.
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