參數(shù)資料
型號(hào)： DS1391U-3+T&R
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 11/26頁(yè)
文件大?。?/td> 0K
描述： IC RTC W/CHARGER 10-USOP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 3,000
類(lèi)型： 時(shí)鐘/日歷
特點(diǎn)： 警報(bào)器，閏年，方波輸出，涓流充電器
時(shí)間格式： HH:MM:SS:hh（12/24 小時(shí)）
數(shù)據(jù)格式： YY-MM-DD-dd
接口： SPI
電源電壓： 2.7 V ~ 3.3 V
電壓 - 電源，電池： 1.3 V ~ 3.7 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 10-TFSOP，10-MSOP（0.118"，3.00mm 寬）
供應(yīng)商設(shè)備封裝： 10-µMAX
包裝： 帶卷 (TR)
DS1390–DS1394
Low-Voltage SPI/3-Wire RTCs with
Trickle Charger
19
Maxim Integrated
The user determines diode and resistor selection
according to the maximum current desired for battery
or super cap charging. The maximum charging current
can be calculated as illustrated in the following exam-
ple. Assume that a system power supply of 3.3V is
applied to VCC and a super cap is connected to
VBACKUP. Also, assume that the trickle charger has
been enabled with a diode and resistor R2 between
VCC and VBACKUP. The maximum current IMAX would
therefore be calculated as follows:
IMAX = (3.3V - diode drop) / R2
≈ (3.3V - 0.7V) /
2k
≈ 1.3mA
As the super cap changes, the voltage drop between
VCC and VBACKUP decreases and therefore the charge
current decreases.
R1
250
R2
2k
R3
4k
VCC
VBACKUP
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
TCS3
TCS2
TCS1
TCS0
DS1
DS0
ROUT1
ROUT0
TRICKLE-CHARGE REGISTER (8Fh WRITE, 0Fh READ)
1 0F 16 SELECT
NOTE: ONLY 1010b ENABLES CHARGER
1 OF 2
SELECT
1 OF 3
SELECT
TCS[3:0] = TRICKLE-CHARGE SELECT
DS[1:0] = DIODE SELECT
ROUT[1:0] = RESISTOR SELECT
Figure 8. DS1390–DS1394 Programmable Trickle Charger
MODE
CPHA
CS
SCLK
SDI
SDO
Disable
X
High
Input Disabled
High-Z
Write
0
Low
CPOL* = 0, SCLK Rising;
CPOL = 1, SCLK Falling
Data Bit Latch
High-Z
Read
0
Low
CPOL = 0, SCLK Falling;
CPOL = 1, SCLK Rising
X
Next Data Bit Shift**
Write
1
Low
CPOL* = 1, SCLK Rising;
CPOL = 0, SCLK Falling
Data Bit Latch
High-Z
Read
1
Low
CPOL = 1, SCLK Falling;
CPOL = 0, SCLK Rising
X
Next Data Bit Shift**
Table 6. SPI Pin Function
*
CPOL is the clock-polarity bit set in the control register of the host microprocessor.
**
SDO remains at high-Z until 8 bits of data are ready to be shifted out during a read.
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