Low-Current I2C RTCs for High-ESR Crystals DS1341/DS1342 rea" />
參數(shù)資料
型號(hào): DS1342U+T&R
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 7/16頁(yè)
文件大?。?/td> 0K
描述: IC RTC I2C W/ALARM 8USOP
產(chǎn)品培訓(xùn)模塊: DS134x Real Time Clocks
Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
類型: 時(shí)鐘/日歷
特點(diǎn): 警報(bào)器,閏年,方波輸出
時(shí)間格式: HH:MM:SS(12/24 小時(shí))
數(shù)據(jù)格式: YY-MM-DD-dd
接口: I²C,2 線串口
電源電壓: 1.8 V ~ 5.5 V
電壓 - 電源,電池: 1.3 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-TSSOP,8-MSOP(0.118",3.00mm 寬)
供應(yīng)商設(shè)備封裝: 8-uMAX
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: DS1342U+T&RDKR
15
Maxim Integrated
Low-Current I2C RTCs for High-ESR Crystals
DS1341/DS1342
reads data with ACK or NACK as applicable, and
generates a STOP condition. See Figure 6 for a read
example using the repeated START condition to
specify the starting memory location.
Reading Multiple Bytes from a Slave: The read
operation can be used to read multiple bytes with a
single transfer. When reading bytes from the slave,
the master simply ACKs the data byte if it desires to
read another byte before terminating the transaction.
After the master reads the last byte it must NACK to
indicate the end of the transfer and then it generates
a STOP condition.
Bus Timeout
To avoid an unintended I2C interface timeout, SCL
should not be held low longer than tTIMEOUTMIN. The
I2C interface is in the reset state and can receive a
new START condition when SCL is held low for at least
tTIMEOUTMAX. When the device detects this condition,
SDA is released and allowed to be pulled high by the
external pullup resistor. For the timeout function to work,
the oscillator must be enabled and running.
Applications Information
Power-Supply Decoupling
To achieve the best results when using the DS1341/
DS1342, decouple the VCC power supply with a 0.01FF
and/or 0.1FF capacitor. Use a high-quality, ceramic, sur-
face-mount capacitor if possible. Surface-mount compo-
nents minimize lead inductance, which improves perfor-
mance, and ceramic capacitors tend to have adequate
high-frequency response for decoupling applications.
Using Open-Drain Outputs
The CLKIN/INTA output is open drain and, therefore,
requires an external pullup resistor to realize a logic-high
output level.
SDA and SCL Pullup Resistors
SDA is an open-drain output and requires an external
pullup resistor to realize a logic-high level.
Because the DS1341/DS1342 do not use clock cycle
stretching, a master using either an open-drain output
with a pullup resistor or CMOS output driver (push-pull)
could be used for SCL.
Chip Information
SUBSTRATE CONNECTED TO GROUND
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 FSOP
U8+1
8 TDFN-EP
T833+2
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