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| 型號： | DP3S1MX32PY5-10CI |
| 英文描述： | x32 SRAM Module |
| 中文描述： | X32號的SRAM模塊 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 510K |
| 代理商： | DP3S1MX32PY5-10CI |
Dense-Pac Microsystems, Inc.
DP3S1MX32PY5
AD VANCED IN FOR MA TION
3
30A244-00
REV. A
AC OPERATING CONDITIONS AND CHARACTERISTICS - READ CYCLE:
Over operating ranges
No. Symbol
Parameter
10ns
12ns
15ns
20ns
Unit
Min.
10
Max.
Min.
12
Max.
Min.
15
Max.
Min.
20
Max.
1
2
3
4
5
6
7
8
9
t
RC
t
AA
t
CO
t
OE
t
BA
t
LZ
t
OLZ
t
BLZ
t
HZ
t
OHZ
t
BHZ
t
OH
Read Cycle Time
Address Access Time
CE to Output Valid
Output Enable to Output Valid
Byte Enable Access Time
CE to Output in LOW-Z
5, 6
Output Enable to Output in LOW-Z
5, 6
Byte Enable to Output in LOW-Z
CE to Output in HIGH-Z
5, 6
Output Enable to Output in HIGH-Z
5, 6
Byte Enable to Output in HIGH-Z
Output Hold from Address Change
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
10
5
5
12
12
6
6
15
15
8
8
20
20
9
9
3
1
1
3
1
1
3
1
1
3
1
1
6
6
6
7
7
7
8
8
8
9
9
9
10
11
12
3
3
3
3
TRUTH TABLE
Mode
CS
OE
WE
BS0
L
H
L
L
L
L
H
L
L
L
X
H
X
BS1
L
L
H
L
L
L
L
H
L
L
X
H
X
BS2
L
L
L
H
L
L
L
L
H
L
X
H
X
BS3
L
L
L
L
H
L
L
L
L
H
X
H
X
I/O0-
I/O7
D
OUT
High-Z
D
OUT
D
OUT
D
OUT
D
IN
High-Z
D
IN
D
IN
D
IN
High-Z
High-Z
High-Z
I/O8-
I/O15
D
OUT
D
OUT
High-Z
D
OUT
D
OUT
D
IN
D
IN
High-Z
D
IN
D
IN
High-Z
High-Z
High-Z
I/O16-
I/O23
D
OUT
D
OUT
D
OUT
High-Z
D
OUT
D
IN
D
IN
D
IN
High-Z
D
IN
High-Z
High-Z
High-Z
I/O24-
I/O31
D
OUT
D
OUT
D
OUT
D
OUT
High-Z
D
IN
D
IN
D
IN
D
IN
High-Z
High-Z
High-Z
High-Z
Supply
Current
Read
L
L
H
Active
Write
L
X
L
Active
Output Data
L
L
H
H
X
X
H
X
X
Active
Standby
H = HIGH L = LOW X = Don’t Care
Standby
AC OPERATING CONDITIONS AND CHARACTERISTICS - WRITE CYCLE
7, 8
:
Over operating ranges
No. Symbol
Parameter
10ns
12ns
15ns
20ns
Unit
Min.
10
8.5
8.5
8.5
0
7
0
Max.
Min.
12
9
9
9
0
8
0
Max.
Min.
15
11
11
11
0
10
0
Max.
Min.
20
15
15
15
0
12
0
Max.
13
14
15
16
17
18
19
20
21
22
23
t
WC
t
AW
t
CW
t
BW
t
AS
t
WP
t
WR
t
WHZ
t
DW
t
DH
t
OW
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Byte Enable to End of Write
Address Set-Up Time *
Write Pulse Width (OE High)
Write Recovery Time, CE, WE
Write Enable to Output in HIGH-Z
5, 6
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
6
7
8
10
6
0
1
7
0
1
8
0
1
10
0
1
* Valid for both Read and Write Cycles.
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