參數(shù)資料
型號(hào)： DNC3X3825
廠商： Lineage Power
英文描述： Octal 10/100 Mbits/s Ethernet Transceiver Macrocell(八通道10M位/秒和100 M位/秒以太網(wǎng)收發(fā)器宏單元)
中文描述： 八路10/100 Mbits /秒以太網(wǎng)收發(fā)器宏單元（八通道1000萬位/秒和100海里位/秒以太網(wǎng)收發(fā)器宏單元）
文件頁(yè)數(shù)： 19/32頁(yè)
文件大?。?/td> 465K
代理商： DNC3X3825
Advance Data Sheet
March 2000
DNC3X3825
Octal 10/100 Mbits/s Ethernet Transceiver Macrocell
19
4
Register Information
Register Descriptions
The MII management 16-bit register set implemented is as follows. The PHY address pins control the management
pins.
Table 12. Summary of Management Registers (MR)
Register
Address
0
1
2
3
4
5
6
7
8—15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
Symbol
Name
Default
(Hex Code)
3000h
7849h
TBD
TBD
01E1h
0000
0000
0000
—
0000
0000
0000
—
—
0000
—
MR0
MR1
MR2
MR3
MR4
MR5
MR6
MR7
Control
Status
PHY Identifier 1
PHY Identifier 2
Autonegotiation Advertisement
Autonegotiation Link Partner Ability
Autonegotiation Expansion
Next Page Transmit
(Reserved)
PCS Control Register
Autonegotiation (read register A)
Autonegotiation (read register B)
Lucent Analog Test Register
User-defined Register
RXER Counter
Lucent Analog Test Registers
MR8—MR15
MR16
MR17
MR18
MR19
MR20
MR21
MR22
MR23
MR24
MR25
MR26
MR27
MR28
MR29
MR30
MR31
Lucent Analog Test (Tuner) Registers
—
Device Specific 1
Device Specific 2
Device Specific 3
Quick Status Register
—
2080
0000
—
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