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參數(shù)資料
| 型號： | DM9102AF |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Single Chip Fast Ethernet NIC controller |
| 中文描述： | 單芯片快速以太網(wǎng)網(wǎng)卡控制器 |
| 文件頁數(shù)： | 51/77頁 |
| 文件大?。?/td> | 459K |
| 代理商： | DM9102AF |
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DM9102A
Single Chip Fast Ethernet NIC controller
Bit 5: FT, Frame Type
It is set to indicate the received frame is the Ethernet-type. It
is reset to indicate the received frame is the EEE802.3- type.
Valid only when ED is set
Final
Version: DM9102A-DS-F03
August 28, 2000
51
Bit 4: RWT, Receive Watchdog Time-Out
It is set to indicate receive Watchdog time-out during the
frame reception. CR5<9> will also be set. Valid only when
ED is set.
Bit 3: PLE, Physical Layer Error
It is set to indicate a physical layer error found during the
frame reception.
Bit 2: AE, Alignment Error
It is set to indicate the received frame ends with a non-byte
boundary.
Bit 1: CE, CRC Error
It is set to indicate the received frame ends with a CRC
error. Valid only when ED is set.
Bit 0: FOE, FIFO Overflow Error
This bit is valid for Ending Descriptor is set. (ED = 1). It is set
to indicate a FIFO Overflow error happens during the frame
reception.
RDES1: Descriptor Status and Buffer Size
31 30 29 28 27 26 25 24 23 22
21 ~ 11
10 ~ 0
CE
Buffer Length
Bit 24: CE, Chain Enable
Must be 1.
Bit 10-0: Buffer Length
Indicates the size of the buffer.
RDES2: Buffer Starting Address
Indicates the physical starting address of buffer. This address must be double word alignment.
31
0
Buffer Address
IRDES3: Next descriptor Address
Indicates the physical starting address of the chained descriptor under the Chain descriptor structure.
This address must be eight word alignment.
31
0
Next descriptor Address
(b). Transmit Descriptor Format
Each transmit descriptor has four double-word content
and may be read or written by the host or by the DM9102A.
The descriptor format is shown below with detailed
description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9102AT | Single Chip Fast Ethernet NIC controller |
| DM9108APPLICATIONENGINEERINGNOTESONE | DM9108 Application Engineering notes one |
| DM9108APPLICATIONENGINEERINGNOTESTHREE | DM9108 Application Engineering notes three |
| DM9108APPLICATIONENGINEERINGNOTESTWO | DM9108 Application Engineering notes two |
| DM9161A | 10/100 MBPS FAST ETHEMET PHYSICAL LAYER SINGLE CHIP TRANSCEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9102AT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single Chip Fast Ethernet NIC controller |
| DM9102D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER |
| DM9102DE | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
| DM9102DEP | 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 1 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:2.375V; Supply Voltage Max:2.625V; Digital IC Case Style:LQFP; No. of Pins:128; Interface Type:PCI; Operating Temperature Min:0C;;RoHS Compliant: Yes |
| DM9102H | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
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