DM9102A
Single Chip Fast Ethernet NIC controller
Final
Version: DM9102A-DS-F03
August 28, 2000
3
(b). Transmit Descriptor Format.........................................51
Initialization Procedure...................................................54
Data Buffer Processing Algorithm.....................................54
1. Receive Data Buffer Processing...................................54
2. Transmit Data Buffer Processing..................................55
Network Function...........................................................56
1. Overview.........................................................................56
2. Receive Process and State Machine............................56
a. Reception Initiation.......................................................56
b. Address Recognition....................................................56
c. Frame Decapsulation...................................................56
3. Transmit Process and State Machine...........................56
a. Transmit Initiation..........................................................56
b. Frame Encapsulation...................................................56
c. Collision.........................................................................56
4. Physical Layer Overview...............................................56
Serial Management Interface........................................57
Power Management......................................................58
1. Overview.........................................................................58
2. PCI Function Power Management Status ....................58
3. The Power Management Operation .............................58
a. Detect Network Link State Change.............................58
b. Active Magic Packet Function......................................58
c. Active the Sample Frame Function.............................58
Sample Frame Programming Guide.............................60
Serial ROM Overview........................................................61
1. Subsystem ID Block.......................................................61
2. SROM Version...............................................................62
3. Controller Count.............................................................62
4. Controller_X Information................................................62
5. Controller Information Body Pointed By Controller_X Info
Block Offset Item in Controller Information Header.......62
6. Example of DM9102A SROM Format..........................63
External MII/SRL Interface................................................66
The Sharing Pin Table.......................................................66
Absolute Maximum Ratings..............................................68
Operating Conditions.........................................................68
DC Electrical Characteristics.............................................69
AC Electrical Characteristics & Timing Waveforms..........70
PCI Clock Spec. Timing.................................................70
Other PCI Signals Timing Diagram...............................70
Multiplex Mode Boot ROM Timing................................71
Direct Mode Boot ROM Timing.....................................72
EEPROM Timing...........................................................72
TP Interface....................................................................73
Oscillator/Crystal Timing................................................73
Auto-negotiation and Fast Link Pulse Timing Parameters
........................................................................................73
Package Information (128 pin, QFP)................................75
Package Information (128 pin, TQFP)..............................76
Ordering Information..........................................................77
Disclaimer..........................................................................77
Company Overview...........................................................77
Products.............................................................................77
Contact Windows...............................................................77
Warning..............................................................................77