參數(shù)資料
型號(hào): DM74KS112AM
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
中文描述: LS SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
封裝: 0.150 INCH, MS-012, SOIC-16
文件頁(yè)數(shù): 2/5頁(yè)
文件大?。?/td> 52K
代理商: DM74KS112AM
www.fairchildsemi.com
2
D
Absolute Maximum Ratings
(Note 2)
Note 2:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Recommended Operating Conditions
Note 3:
C
L
=
15 pF, R
L
=
2 k
, T
A
=
25
°
C and V
CC
=
5V.
Note 4:
The symbol (
) indicates the falling edge of the clock pulse is used for reference.
Note 5:
C
L
=
50 pF, R
L
=
2 k
, T
A
=
25
°
C and V
CC
=
5V.
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
7V
0
°
C to
+
70
°
C
65
°
C to
+
150
°
C
Symbol
Parameter
Min
4.75
2
Nom
5
Max
5.25
Units
V
V
V
mA
mA
MHz
MHz
V
CC
V
IH
V
IL
I
OH
I
OL
f
CLK
f
CLK
t
W
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 3)
Clock Frequency (Note 5)
Pulse Width
(Note 3)
0.8
0.4
8
30
25
0
0
Clock HIGH
Preset LOW
Clear LOW
Clock HIGH
Preset LOW
Clear LOW
20
25
25
25
30
30
20
25
0
5
0
ns
t
W
Pulse Width
(Note 5)
ns
t
SU
t
SU
t
H
t
H
T
A
Setup Time (Note 3)(Note 4)
Setup Time (Note 4)(Note 5)
Hold Time (Note 3)(Note 4)
Hold Time (Note 4)(Note 5)
Free Air Operating Temperature
ns
ns
ns
ns
°
C
70
相關(guān)PDF資料
PDF描述
DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs(雙負(fù)邊緣觸發(fā)的J-K觸發(fā)器(帶預(yù)置、清除端、互補(bǔ)輸出))
DM74LS112AN Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
DM74LS11M Triple 3-Input AND Gate
DM74LS11 Triple 3-Input AND Gate(三3輸入與門)
DM74LS11N Triple 3-Input AND Gate
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM74L00N 制造商:National Semiconductor Corporation 功能描述: 制造商:Texas Instruments 功能描述: 制造商:Texas Instruments 功能描述:Logic Circuit, Quad 2-Input NAND, L-TTL, 14 Pin, Plastic, DIP
DM74L02N 制造商:Texas Instruments 功能描述:
DM74L10N 制造商:Texas Instruments 功能描述:
DM74L193N 制造商:National Semiconductor Corporation 功能描述:Counter, Up/Down, 4 Bit Binary, 16 Pin, Plastic, DIP 制造商:Texas Instruments 功能描述:Counter, Up/Down, 4 Bit Binary, 16 Pin, Plastic, DIP
DM74L20N 制造商:Texas Instruments 功能描述: