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參數(shù)資料
| 型號： | DK-DEV-2AGX125N |
| 廠商： | Altera |
| 文件頁數(shù)： | 86/90頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT DEV ARRIA II GX FPGA 2AGX125 |
| 產(chǎn)品培訓模塊： | Arria II GX FPGA Three Reasons to Use FPGA's in Industrial Designs |
| 特色產(chǎn)品： | Arria? II GX FPGA Development Kit |
| 標準包裝： | 1 |
| 系列： | Arria II GX |
| 類型： | FPGA |
| 適用于相關產(chǎn)品： | EP2AGX125EF35 |
| 所含物品： | 板，線纜，CD，DVD，電源 |
| 產(chǎn)品目錄頁面： | 605 (CN2011-ZH PDF) |
| 相關產(chǎn)品： | 544-2599-5-ND - IC ARRIA II GX 125K 1152FBG 544-2598-5-ND - IC ARRIA II GX 125K 1152FBG 544-2597-5-ND - IC ARRIA II GX 125K 1152FBG |
| 其它名稱： | 544-2600 |
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December 2010
AIIGX53002-2.0
2010 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat. & Tm. Off.
and/or trademarks of Altera Corporation in the U.S. and other countries. All other trademarks and service marks are the property of their respective holders as described at
www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but
reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
2. Addendum for the Arria II Device
Handbook
This chapter describes changes to the published version of the Arria II Device
Handbook. All changes from Revision 1.1 of this chapter are now incorporated in the
main handbook chapters.
Highlights
f This information is now located in the Overview for the Arria II Device Family chapter.
High-Speed LVDS I/O with DPA and Soft CDR
f This information is now located in the Overview for the Arria II Device Family chapter.
Auto-Calibrating External Memory Interfaces
f This information is now located in the Overview for the Arria II Device Family chapter.
Connecting a Serial Configuration Device to an Arria II Device Family
on AS Interface
f This information is now located in the Configuration, Design Security, and Remote
Document Revision History
Table 2–1 lists the revision history for this chapter.
Table 2–1. Document Revision History
Date
Version
Changes
December 2010
2.0
■ Updated chapter titles.
July 2010
1.2
■ Moved the “Highlights”, “High-Speed LVDS I/O with DPA and Soft CDR”, and
“Auto-Calibrating External Memory Interfaces” sections to the
Arria II GX Device Family Overview chapter.
■ Moved the “Guidelines for Connecting Serial Configuration Device to Arria II GX
Device Family on AS Interface” section to the Configuration, Design Security, and
Remote System Upgrades in Arria II GX Devices chapter
March 2010
1.1
Added “Guidelines for Connecting Serial Configuration Device to Arria II GX Device
Family on AS Interface”
February 2010
1.0
Initial release.
December 2010
AIIGX53002-2.0
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| DK-DEV-3CLS200N | 功能描述:可編程邏輯 IC 開發(fā)工具 FPGA Development Kit For EP3CLS200F780 RoHS:否 制造商:Altera Corporation 產(chǎn)品:Development Kits 類型:FPGA 工具用于評估:5CEFA7F3 接口類型: 工作電源電壓: |
| DK-DEV-3SL150N | 功能描述:可編程邏輯 IC 開發(fā)工具 FPGA Development Kit For EP3SL150F152 RoHS:否 制造商:Altera Corporation 產(chǎn)品:Development Kits 類型:FPGA 工具用于評估:5CEFA7F3 接口類型: 工作電源電壓: |
| DK-DEV-3SL150N/ES | 制造商:Altera Corporation 功能描述:KIT DEVELOPMENT STRATIX II ES |
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