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參數(shù)資料
| 型號(hào)： | DDC118IRTCT |
| 英文描述： | Octal Current Input 20-Bit Analog-To-Digital Converter |
| 中文描述： | 八路電流輸入20位模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 4/30頁(yè) |
| 文件大?。?/td> | 384K |
| 代理商： | DDC118IRTCT |
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SBAS325A JUNE 2004 REVISED JUNE 2005
www.ti.com
4
ELECTRICAL CHARACTERISTICS (continued)
At TA = +25
°
C, AVDD = +5V, DVDD = 3V, VREF = +4.096V, Range 5 (250pC), and continuous mode operation, unless otherwise noted.
Low-Power Mode: TINT = 400
μ
s and CLK = 4MHz; High-Speed Mode: TINT = 320
μ
s and CLK = 4.8MHz.
High-Speed Mode
Low-Power Mode
PARAMETER
UNITS
MAX
TYP
MIN
MAX
TYP
MIN
TEST CONDITIONS
DIGITAL INPUT/OUTPUT
Logic Levels
V
IH
V
IL
V
OH
V
OL
Input Current (I
IN
)
Data Format
(12)
0.8DVDD
0.1
DVDD 0.4
DVDD + 0.1
0.2DVDD
V
V
V
V
μ
A
I
OH
= 500
μ
A
I
OL
= 500
μ
A
0 < V
IN
< DVDD
0.4
±
10
Straight Binary
POWER-SUPPLY REQUIREMENTS
Analog Power-Supply Voltage (AVDD)
Digital Power-Supply Voltage (DVDD)
Supply Current
Total Analog Current
Total Digital Current
Total Power Dissipation
Total Power Dissipation per Channel
4.75
2.7
5.25
5.25
V
V
21
1
108
13.5
28
1.34
144
18
mA
mA
mW
mW
DVDD = +3V
DVDD = +3V
DVDD = +3V
150
18.75
200
25
(1)
indicates that specification is the same as Low-Power Mode.
(2)Exceeding maximum input current specification may damage device.
(3)Input is less than 1% of full scale.
(4)CSENSOR is the capacitance seen at the DDC118 inputs from wiring, photodiode, etc.
(5)FSR is Full-Scale Range.
(6)A best-fit line is used in measuring nonlinearity.
(7)Matching between side A and side B of the same input.
(8)Ensured by design, not production tested.
(9)Voltage produced by the DDC118 at its input which is applied to the sensor.
(10)Range drift does not include external reference drift.
(11)Input reference current decreases with increasing TINT (see the
Voltage Reference
section, page 11).
(12)Data format is Straight Binary with a small offset. The number of bits in the output word is controlled by the FORMAT pin (see text).
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參數(shù)描述 |
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