參數(shù)資料
型號: DD28F032SA
廠商: Intel Corp.
英文描述: 32-Mbit (2 Mbit x 16,4 Mbit x 8) FlashFile Memory(32-M位 (2 M位 x 16,4 M位 x 8) FlashFile存儲器)
中文描述: 32兆位(2兆x 16.4兆位× 8)FlashFile內(nèi)存(32米位(2米位x 16,4 M位× 8)FlashFile存儲器)
文件頁數(shù): 25/49頁
文件大?。?/td> 736K
代理商: DD28F032SA
E
6.4 DC Characteristics
(Continued)
V
CC
= 3.3V ± 0.3V, T
A
= 0°C to +70°C
3/5# Pin Set High for 3.3V Operations
DD28F032SA
25
SEE NEW DESIGN RECOMMENDATIONS
Symbol
Parameter
Notes
Min
Typ
Max
Units
Test Conditions
V
PP
= V
PPH
Program in Progress
I
PPW
V
PP
Program
Current for Word or
Byte
1
10
15
mA
I
PPE
V
PP
Block Erase
Current
1
4
10
mA
V
PP
= V
PPH
Block Erase in Progress
I
PPES
V
PP
Erase
Suspend Current
1
130
400
μA
V
PP
= V
PPH
Block Erase Suspended
V
IL
Input Low Voltage
–0.3
0.8
V
V
IH
Input High Voltage
2.0
V
CC
± 0.3
V
V
OL
Output Low Voltage
0.4
V
V
CC
= V
CC
Min
I
OL
= 4 mA
V
CC
= V
CC
Min
I
OH
= –2.0 mA
V
CC
= V
CC
Min
I
OH
= –100 μA
V
OH
1
Output High
Voltage
2.4
V
V
OH
2
V
CC
– 0.2
V
PPL
V
PP
during Normal
Operations
V
PP
during
Program/Erase
Operations
V
CC
Program/Erase
Lock Voltage
3
0.0
6.5
V
V
PPH
11.4
12.0
12.6
V
V
LKO
2.0
V
NOTES:
1.
All current are in RMS unless otherwise noted. Typical values at V
CC
= 3.3V, V
PP
= 12.0V, T = 25°C. These currents are
valid for all product versions (package and speeds).
I
is specified with the device de-selected. If the device is read while in erase suspend mode, current draw is the sum
of I
CCES
and I
CCR
.
Block erases, word/byte programs and lock block operations are inhibited when V
PP
= V
PPL
and not guaranteed in the
range between V
PPH
and V
PPL
.
Automatic Power Savings (APS) reduces I
CCR
to <1 mA in static operation.
CMOS Inputs are either V
CC
± 0.2V or GND ± 0.2V. TTL Inputs are either V
IL
or V
IH
.
CE
X
# = CE
1
#
or CE
2
#.
If operating with TTL levels, add 4 mA of V
CC
Standby Current to max I
CCR
1, I
CCR
2, I
CCW
, I
CCE
and I
CCES
.
Standby current levels are not reached when putting the chip in standby mode immediately after reading the page buffer.
Default the device into read array or read Status Register mode before entering standby to ensure standby current levels.
2.
3.
4.
5.
6.
7.
8.
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