參數(shù)資料
型號(hào)： DC1684A-B
廠商： Linear Technology
文件頁(yè)數(shù)： 10/24頁(yè)
文件大?。?/td> 0K
描述： BOARD DAC LTC2752
軟件下載： QuikEval System
設(shè)計(jì)資源： DC1684A Design File
DC1684A Schematic
標(biāo)準(zhǔn)包裝： 1
系列： QuikEval™, SoftSpan™
DAC 的數(shù)量： 2
位數(shù)： 16
數(shù)據(jù)接口： 串行，SPI?
設(shè)置時(shí)間： 2µs
DAC 型： 電流
工作溫度： 0°C ~ 70°C
已供物品： 板
已用 IC / 零件： LTC2752
相關(guān)產(chǎn)品： DC590B-ND - BOARD DEMO USB SERIAL CONTROLLER
LTC2752BILX#PBF-ND - IC DAC 16BIT DUAL CUR OUT 48LQFP
LTC2752AILX#PBF-ND - IC DAC 16BIT DUAL CUR OUT 48LQFP
LTC2752BCLX#PBF-ND - IC DAC 16BIT DUAL CUR OUT 48LQFP
LTC2752ACLX#PBF-ND - IC DAC 16BIT DUAL CUR OUT 48LQFP
LTC2752
2752f
a) CS/LD
↓ (Note that after power-on, the code in
Input register is zero)
Clock SDI =
0000 0000 0011 0010 1000 0000 0000 0000
b) CS/LD
↑
Code Input register- Code of DAC B set to
midscale setting.
c) CS/LD
↓
Clock SDI =
0000 0000 0010 0010 0000 0000 0000 0100
Data out on SRO = 1000 0000 0000 0000 Verifies
that Code Input register- DAC B is at midscale
setting.
d) CS/LD
↑
Span Input register- Range of DAC B set to
Bipolar ±2.5V range.
e) CS/LD
↓
Clock SDI =
0000 0000 1010 0010 XXXX XXXX XXXX XXXX
Data Out on SRO = 0000 0000 0000 0100
Verifies that Span Input register- range of DAC B
set to Bipolar ±2.5V Range.
CS/LD
↑
f) CS/LD
↓
Clock SDI =
0000 0000 0100 0010 XXXX XXXX XXXX XXXX
g) CS/LD
↑
Update DAC B for both Code and Range
h) Alternatively steps f and g could be replaced with
LDAC
.
System Offset and Reference Adjustments
Many systems require compensation for overall system
offset. This may be an order of magnitude or more greater
than the offset of the LTC2752, which is so low as to be
dominated by external output amplifier errors even when
using the most precise op amps.
operaTion
Examples
1. Using a 24-bit instruction, load DAC A with the unipolar
range of 0V to 10V, output at zero volts and DAC B with
the bipolar range of ±10V, outputs at zero volts. Note all
DAC outputs should change at the same time.
a) CS/LD
↓
Clock SDI = 0010 1111 0000 0000 0000 0011
b) CS/LD
↑
Span Input register- Range of all DACs set to
bipolar ±10V.
c) CS/LD
↓
Clock SDI = 0010 0000 0000 0000 0000 0001
d) CS/LD
↑
Span Input register- Range of DAC A set to
unipolar 0V to 10V.
e) CS/LD
↓
Clock SDI = 0011 1111 1000 0000 0000 0000
f) CS/LD
↑
Code Input register- Code of all DACs set to
midscale.
g) CS/LD
↓
Clock SDI = 0011 0000 0000 0000 0000 0000
h) CS/LD
↑
Code Input register- Code of DAC A set to
zero code.
i) CS/LD
↓
Clock SDI = 0100 1111 XXXX XXXX XXXX XXXX
j) CS/LD
↑
Update all DACs for both Code and Range.
k) Alternatively steps i and j could be replaced with
LDAC
.
2. Using a 32-bit load sequence, load DAC B with bipolar
±2.5V and its output at zero volts. Use readback to check
Input register contents before updating the DAC output
(i.e., before copying Input register contents into DAC
register).
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