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參數(shù)資料
| 型號： | DC1485A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD DAC LTC2757 |
| 軟件下載： | QuikEval System |
| 設(shè)計資源： | DC1485A Design Files DC1485A Schematic |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | QuikEval™, SoftSpan™ |
| DAC 的數(shù)量： | 1 |
| 位數(shù)： | 18 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 設(shè)置時間： | 2.1µs |
| DAC 型： | 電流 |
| 已供物品： | 板 |
| 已用 IC / 零件： | LTC2757 |
| 相關(guān)產(chǎn)品： | DC590B-ND - BOARD DEMO USB SERIAL CONTROLLER LTC2757BCLX#PBF-ND - IC DAC 18BIT PAR 48LQFP LTC2757ACLX#PBF-ND - IC DAC 18BIT PAR 48LQFP LTC2757BILX#PBF-ND - IC DAC 18BIT PAR 48LQFP LTC2757AILX#PBF-ND - IC DAC 18BIT PAR 48LQFP |
LTC2757
13
2757f
1. Load ±5V range with the output at 0V. Note that since span and code are updated together, the output, if started at
0V, will stay there. The 18-bit DAC code is shown in hex for compactness.
OPERATION
WR
2757 TD03
SPAN I/O
INPUT
DATA I/O
INPUT
UPD
D/S
20000H
010
READ = LOW
VOUT
UPDATE
(±5V RANGE, VOUT = 0V)
0V (00000H IN 0V to 5V RANGE)
0V (20000H IN ±5V RANGE)
The offset adjust pin VOSADJ can be used to null unipolar
offset or bipolar zero error. The offset change expressed
in LSB is the same for any output range:
ΔV
OS LSB
[]=
–V(VOSADJ)
V(RIN)
2048
A 5V control voltage applied to VOSADJ produces ΔVOS =
–2048 LSB in any output range, assuming a 5V reference
voltage at RIN.
In voltage terms, the offset delta is attenuated by a factor
of 32, 64 or 128, depending on the output range. (These
functions hold regardless of reference voltage.)
ΔVOS = –(1/128)VOSADJ
[0V to 5V, ±2.5V spans]
ΔVOS = –(1/64)VOSADJ
[0V to 10V, ±5V, –2.5V to
7.5V spans]
ΔVOS = –(1/32)VOSADJ
[±10V span]
The gain error adjust pin GEADJ can be used to null gain
error or to compensate for reference errors. The gain er-
ror change expressed in LSB is the same for any output
range:
ΔGE =
V(GEADJ)
V(RIN)
2048
The gain-error delta is non-inverting for positive reference
voltages.
Note that this pin compensates the gain by altering the
inverted reference voltage V(REF). In voltage terms,
the V(REF) delta is inverted and attenuated by a factor
of 128.
ΔV(REF) = –(1/128)GEADJ
The nominal input range of these pins is ±5V; other volt-
ages of up to ±15V may be used if needed. However, do
not use voltages divided down from power supplies; ref-
erence-quality, low-noise inputs are required to maintain
the best DAC performance.
The VOSADJ pin has an input impedance of 1.28MΩ. This
pin should be driven with a Thevenin-equivalent impedance
of 10k or less to preserve the settling performance of the
LTC2757. It should be shorted to GND if not used.
The GEADJ pin has an input impedance of 2.56MΩ, and
is intended for use with xed reference voltages only. It
should be shorted to GND if not used.
OPERATION—EXAMPLES
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