參數(shù)資料
型號(hào): DAC8420FSZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 24/24頁
文件大?。?/td> 0K
描述: IC DAC 12BIT QUAD SRL LP 16SOIC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 1,000
設(shè)置時(shí)間: 8µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 4
電壓電源: 雙 ±
功率耗散(最大): 255mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 4 電壓,單極;4 電壓,雙極
采樣率(每秒): 125k
DAC8420
Rev. B | Page 9 of 24
Table 6. Control Function Logic Table
LD
CLR
CLSEL
Serial Input Shift Register
DAC Register A to DAC Register D
NC2
High
Low
High
No change
Loads midscale value (0x800)
High
Low
No change
Loads zero-scale value (0x000)
High
High /Low
No change
Latches value
Low
High
Shifts register one bit
No change
Low
High
Shifts register one bit
No change
High
NC (
)2
High
No change
Loads the serial data-word3
High
Low
High
No change
Transparent4
High
No change
1 CLK and CS are interchangeable.
2 NC = Don’t Care.
3 Returning CS high while CLK is high avoids an additional false clock of serial input data. CLK and CS are interchangeable.
4 Do not clock in serial data while LD is low.
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