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參數(shù)資料
| 型號： | DAC8420FSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 19/24頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 12BIT QUAD SRL LP 16SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Data Converter Fundamentals DAC Architectures |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 設(shè)置時間： | 8µs |
| 位數(shù)： | 12 |
| 數(shù)據(jù)接口： | 串行 |
| 轉(zhuǎn)換器數(shù)目： | 4 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 255mW |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC W |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 4 電壓，單極；4 電壓，雙極 |
| 采樣率（每秒）： | 125k |
DAC8420
Rev. B | Page 4 of 24
Parameter
Symbol
Condition
Min
Typ
Max
Unit
SUPPLY CHARACTERISTICS
Power Supply Sensitivity
PSRR
0.002
0.01
%/%
Positive Supply Current
IDD
4
7
mA
Negative Supply Current
ISS
6
3
mA
Power Dissipation
PDISS
VSS = 0 V
20
35
mW
1 Typical values indicate performance measured at 25°C.
2 All supplies can be varied ±5% and operation is guaranteed. Device is tested with VDD = 4.75 V.
3 For single-supply operation (VVREFLO = 0 V, VSS = 0 V), due to internal offset errors INL and DNL are measured beginning at Code 0x005.
4 Guaranteed, but not tested.
5 Operation is guaranteed over this reference range, but linearity is neither tested nor guaranteed.
6 VOUT swing between +2.5 V and 2.5 V with VDD = 5.0 V.
7 All input control signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
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