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參數(shù)資料
| 型號： | D2-24044-MR-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 15/20頁 |
| 文件大小： | 0K |
| 描述： | IC DGTL AMP AUDIO PWR D 38HTSSOP |
| 標準包裝： | 2,500 |
| 系列： | D2Audio™ |
| 類型： | D 類 |
| 輸出類型： | 2-通道（立體聲）或 4 通道（四路） |
| 在某負載時最大輸出功率 x 通道數(shù)量： | 30W x 2 @ 8 歐姆 |
| 電源電壓： | 9 V ~ 26 V |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 38-HTSSOP |
| 封裝/外殼： | 38-TFSOP （0.173"，4.40mm 寬）裸露焊盤 |
| 包裝： | 帶卷 (TR) |
4
FN7678.0
September 3, 2010
Absolute Maximum Ratings
Thermal Information
Supply Voltage
HVDD[A:D], VDDHV. . . . . . . . . . . . . . . . . . 0V to +28.0V
PWMVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to 4.0V
Input Voltage
Any Input . . . . . . . . . . . . . . . . . -0.3V to PWMVDD + 0.3V
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
38 Ld HTSSOP Package (Notes 4, 5)
29
1.3
Maximum Storage Temperature . . . . . . . . -55°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
Recommended Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . .-10°C to +85°C
High Voltage Supply Voltage,
HVDD[A:D], VDDHV . . . . . . . . . . . . . . . . . . 9.0V to 26.5V
Digital I/O Supply Voltage, PWMVDD. . . . . . . . . . . . . . 3.3V
Minimum Load Impedance (HVDD[A:D]
≤24.0V), ZL . . . . 4Ω
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
6. Absolute Maximum parameters are not tested in production.
Electrical Specifications TA = +25°C, PWMVDD = 3.3V ±10%. All grounds at 0.0V.
All voltages referenced to ground.
PARAMETER
TEST
CONDITIONS
SYMBOL
MIN
TYP MAX UNIT
Digital Input High Logic Level
VIH
2-
-
V
Digital Input Low Logic Level
VIL
-
0.4
V
High Level Output Drive Voltage
(IOUT at -Pin Drive Strength Current)
VOH
PWMVDD-0.4
-
V
Low Level Output Drive Voltage
(IOUT at +Pin Drive Strength Current)
VOL
-
0.4
V
Input Leakage Current
Pins 1, 2, 3
IIN
-
±10
μA
PWM Input Pins
(includes 100kΩ internal pull-down
resistor current)
-
±50
μA
Input Capacitance
CIN
-9
-
pF
Output Capacitance
All Outputs Except OUT[A:D]
COUT
-9
-
pF
OUT[A:D]
-
190
-
Internal Pull-Up Resistance to PWMVDD
(for nERRORA-D, nOVRT)
-
100
-
kΩ
Digital I/O Supply Pin Voltage, Current
PWMVDD
3
3.3
3.6
V
Active Current
-
0.47
-
mA
Power-Down Current
-
0.15
-
mA
3.3V (PWMVDD) BROWN-OUT DETECTION
Logic Supply Undervoltage Threshold
-
2.6
-
V
Logic Supply Undervoltage Threshold Hysteresis
-
200
-
mV
Logic Supply Undervoltage Glitch Rejection
-
50
-
ns
GATE DRIVE INTERNAL +5V BROWN-OUT DETECTION
Gate Drive Supply Undervoltage Threshold
-
4.5
-
V
D2-24044
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