- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄369678 > CYK512K16SCCAU Memory PDF資料下載
參數(shù)資料
| 型號(hào)： | CYK512K16SCCAU |
| 英文描述： | Memory |
| 中文描述： | 內(nèi)存 |
| 文件頁(yè)數(shù)： | 4/10頁(yè) |
| 文件大小： | 174K |
| 代理商： | CYK512K16SCCAU |
ADVANCE
INFORMATION
CYK512K16SCCAU
MoBL3
Document #: 38-05425 Rev. **
Page 4 of 10
Capacitance
[10]
Parameter
Description
Test Conditions
T
A
= 25°C, f = 1 MHz,
V
CC
= V
CC(typ)
Max.
6
8
Unit
pF
pF
C
IN
C
OUT
Input Capacitance
Output Capacitance
Thermal Resistance
[10]
Parameter
Θ
JA
Description
Test Conditions
BGA
55
Unit
°
C/W
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Still Air, soldered on a 3 × 4.5 inch, two-layer printed
circuit board
Θ
JC
16
°
C/W
AC Test Loads and Waveforms
Parameters
R1
R2
R
TH
V
TH
3.0V V
CC
1179
1941
733
1.87
Unit
V
Switching Characteristics
Over the Operating Range
[11]
Parameter
Description
70 ns
Unit
Min.
Max.
Read Cycle
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
LZOE
t
HZOE
t
LZCE
t
HZCE
t
DBE
t
LZBE
t
HZBE
Notes:
10.Tested initially and after any design or process changes that may affect these parameters.
11. Test conditions for all parameters other than tri-state parameters assume signal transition time of 1 ns/V, timing reference levels of V
CC(typ)
/2, input pulse levels
of 0V to V
CC(typ.)
, and output loading of the specified I
/I
as shown in the “AC Test Loads and Waveforms” section.
12.t
, t
, and t
transitions are measured when the outputs enter a high impedance state—100 mV from the steady state.
13.High-Z and Low-Z parameters are characterized and are not 100% tested.
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW and CE
2
HIGH to Data Valid
OE LOW to Data Valid
OE LOW to LOW Z
[12, 13]
OE HIGH to High Z
[12, 13]
CE LOW and CE
2
HIGH to Low Z
[12, 13]
CE HIGH and CE
2
LOW to High Z
[12, 13]
BLE / BHE LOW to Data Valid
BLE / BHE LOW to Low Z
[12, 13]
BLE / BHE HIGH to HIGH Z
[12, 13]
70
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
70
10
70
35
5
25
5
25
70
5
25
VCC
VCC
OUTPUT
R2
50 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
Rise Time = 1 V/ns
Fall Time = 1 V/ns
OUTPUT
V
Equivalent to:
THé ENIN EQUIVALENT
RTH
ALL INPUT PULSES
R1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CYL2T0201-AIP | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| CYM1910PV-25C | SYNC SRAM|16KX68|CMOS|DIP|104PIN|PLASTIC |
| CYM1910PV-35C | SYNC SRAM|16KX68|CMOS|DIP|104PIN|PLASTIC |
| CYM1910PV-45C | SYNC SRAM|16KX68|CMOS|DIP|104PIN|PLASTIC |
| CYM1911PV-25C | SRAM|16KX68|CMOS|DIP|104PIN|PLASTIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYK512K16SCCAU-55BAI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:8-Mbit (512K x 16) Pseudo Static RAM |
| CYK512K16SCCAU-55BAIT | 制造商:Cypress Semiconductor 功能描述:SRAM ASYNC SGL 3V 8MBIT 512KX16 55NS 48FBGA - Tape and Reel |
| CYK512K16SCCAU-70BAI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:8-Mbit (512K x 16) Pseudo Static RAM |
| CYL | 制造商:EDI 制造商全稱:Electronic devices inc. 功能描述:HIGH VOLTAGE CYLINDER SILICON RECTIFIERS |
| CYL2T0201-AIP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Framers and Mappers |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。