參數(shù)資料
型號： CY37128VP84-83YMB
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： PLD
英文描述： EE PLD, 15 ns, CQCC84
封裝： CERAMIC, LCC-84
文件頁數(shù)： 7/66頁
文件大?。?/td> 1259K
代理商： CY37128VP84-83YMB
Ultra37000 CPLD Family
15
5.0V Device Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min.
Typ.
Max.
Unit
VOH
Output HIGH Voltage
VCC = Min. IOH = –3.2 mA (Com’l/Ind)
[4]
2.4
V
IOH = –2.0 mA (Mil)
[4]
2.4
V
VOHZ
Output HIGH Voltage with
Output Disabled[8]
VCC = Max. IOH = 0 A (Com’l)
[5]
4.2
V
IOH = 0 A (Ind/Mil)
[5]
4.5
V
IOH = –100 A (Com’l)
[5]
3.6
V
IOH = –150 A (Ind/Mil)
[5]
3.6
V
VOL
Output LOW Voltage
VCC = Min. IOL = 16 mA (Com’l/Ind)
[4]
0.5
V
IOL = 12 mA (Mil)
[4]
0.5
V
VIH
Input HIGH Voltage
Guaranteed Input Logical HIGH Voltage
for all Inputs[6]
2.0
VCCmax
V
VIL
Input LOW Voltage
Guaranteed Input Logical LOW Voltage
for all Inputs[6]
–0.5
0.8
V
IIX
Input Load Current
VI = GND OR VCC, Bus-Hold Disabled
–10
10
A
IOZ
Output Leakage Current
VO = GND or VCC, Output Disabled,
Bus-Hold Disabled
–50
50
A
IOS
Output Short Circuit
Current[7, 8]
VCC = Max., VOUT = 0.5V
–30
–160
mA
IBHL
Input Bus-Hold LOW
Sustaining Current
VCC = Min., VIL = 0.8V
+75
A
IBHH
Input Bus-Hold HIGH
Sustaining Current
VCC = Min., VIH = 2.0V
–75
A
IBHLO
Input Bus-Hold LOW Overdrive
Current
VCC = Max.
+500
A
IBHHO
Input Bus-Hold HIGH Overdrive
Current
VCC = Max.
–500
A
Inductance[8]
Parameter
Description
Test
Conditions
44-
Lead
TQFP
44-
Lead
PLCC
44-
Lead
CLCC
84-
Lead
PLCC
84-
Lead
CLCC
100-
Lead
TQFP
160-
Lead
TQFP
208-
Lead
PQFP
Unit
L
Maximum Pin
Inductance
VIN = 5.0V
at f = 1 MHz
2
5
2
8
5
8
9
11
nH
Capacitance[8]
Parameter
Description
Test Conditions
Max.
Unit
CI/O
Input/Output Capacitance
VIN = 5.0V at f = 1 MHz at TA = 25°C
10
pF
CCLK
Clock Signal Capacitance
VIN = 5.0V at f = 1 MHz at TA = 25°C
12
pF
CDP
Dual Function Pins[9]
VIN = 5.0V at f = 1 MHz at TA = 25°C
16
pF
Endurance Characteristics[8]
Parameter
Description
Test Conditions
Min.
Typ.
Unit
N
Minimum Reprogramming Cycles
Normal Programming Conditions[2]
1,000
10,000
Cycles
Notes:
4.
IOH = –2 mA, IOL = 2 mA for TDO.
5.
When the I/O is output disabled, the bus-hold circuit can weakly pull the I/O to above 3.6V if no leakage current is allowed. Note that all I/Os are output disabled
during ISR programming. Refer to the application note “Understanding Bus-Hold” for additional information.
6.
These are absolute values with respect to device ground. All overshoots due to system or tester noise are included.
7.
Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. VOUT = 0.5V has been chosen to avoid test
problems caused by tester ground degradation.
8.
Tested initially and after any design or process changes that may affect these parameters.
9.
Dual pins are I/O with JTAG pins.
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