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參數(shù)資料
| 型號(hào)： | CY2DP818ZXCT |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 2DP SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO38 |
| 封裝： | 4.40 MM, LEAD FREE, TSSOP-38 |
| 文件頁(yè)數(shù)： | 3/7頁(yè) |
| 文件大?。?/td> | 239K |
| 代理商： | CY2DP818ZXCT |
CY2DP818
Document #: 38-07061 Rev. *B
Page 3 of 7
Maximum Ratings[1]
Storage Temperature: ................................ –65
°C to + 150°C
Ambient Temperature: .................................. –40
°C to +85°C
Supply Voltage to Ground Potential
(Inputs and VDD only) .......................................–0.3V to 4.6V
Supply Voltage to Ground Potential
(Outputs only) ........................................ –0.3V to VDD + 0.3V
DC Input Voltage ................................... –0.3V to VDD + 0.3V
DC Output Voltage................................. –0.3V to VDD + 0.9V
Power Dissipation....................................................... 0.75W.
DC Electrical Specifications
Table 3. Power Supply Characteristics
Parameter
Description
Test Conditions
Min
Typ
Max
Unit
ICC
Dynamic Power Supply Current
VDD = Max
Input toggling 50% Duty Cycle,
Outputs Open
1.5
2.0
mA/
MHz
IC
Total Power Supply Current
VDD = Max
Input toggling 50% Duty Cycle,
Outputs 50 ohms
fL=100 MHz
350
mA
IC Core
Core current when output loads are
disabled
VDD = Max
Input toggling 50% Duty Cycle,
Outputs not connected to VTT
fL=100 MHz
50
mA
Table 4. LVDS Input, VDD = 3.3V ±5%, TA = 0°C to 70°C or –40°C to 85°C
Parameter
Description
Conditions
Min
Typ
Max
Unit
VID
Magnitude of Differential Input Voltage
100
600
mV
VIC
Common-mode of Differential Input
VoltageIVIDI (min and max)
IVIDI/2
2.4–(IVIDI/2)
V
VIH
Input High Voltage
Guaranteed Logic High Level
2
V
VIL
Input Low Voltage
Guaranteed Logic Low Level
0.8
V
IIH
Input High Current
VDD = Max, VIN = VDD
±10
±20
μA
IIL
Input Low Current
VDD = Max, VIN = VSS
±10
±20
μA
Table 5. LVPECL Input, VDD = 3.3V ±5%, TA = 0°C to 70°C or –40°C to 85°C
Parameter
Description
Conditions
Min
Typ
Max
Unit
VID
Differential Input Voltage p-p
Guaranteed Logic High Level
400
2600
mV
VIH
Input High Voltage
Guaranteed Logic High Level
2.15
2.4
V
VIL
Input Low Voltage
Guaranteed Logic Low Level
1.5
1.8
V
IIH
Input High Current
VDD = Max, VIN = VDD
±10
±20
μA
IIL
Input Low Current
VDD = Max, VIN = VSS
±10
±20
μA
VCM
Common-mode Voltage
225
mV
Table 6. LVTTL/LVCMOS Input, VDD = 3.3V ±5%, TA = 0°C to 70°C or –40°C to 85°C
Parameter
Description
Conditions
Min
Typ
Max
Unit
VIH
Input High Voltage
2
V
VIL
Input Low Voltage
0.8
V
IIH
Input High Current
VDD = Max, VIN = 2.7V
1
μA
IIL
Input Low Current
VDD = Max, VIN = 0.5V
–1
μA
Note
1. Stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. This is intended to be a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect reliability.
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