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參數(shù)資料
| 型號： | CY292510 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時鐘和緩沖器 |
| 文件頁數(shù)： | 4/6頁 |
| 文件大?。?/td> | 72K |
| 代理商： | CY292510 |
CY292510
Document #: 38-07472 Rev. **
Page 4 of 6
Parameter Measurement Information
Notes:
12. Time required for the integrated PLL circuit to obtain phase lock of its feedback signal to its reference signal. For phase lock to be obtained, a fixed-frequency
fixed-phase reference signal must be present at CLK. Until phase lock is obtained, the specifications for propagation delay, skew and jitter parameters given in
the switching characteristics table are not applicable.
13. t
R
/t
are measured at 0.4V to 2.0V.
14. C
includes probe and jig capacitance.
15. All input pulses are supplied by generators having the following characteristics: input frequency
≤
100 MHz, Zo = 50
, tr
≤
1.2 ns, tf
<
1.2 ns.
16. The outputs are measured one at a time with one transition per measurement.
tsk(o)
[6,7,9]
Jitter(cycle-to-cycle)
t
R[13]
t
F[13]
t
PD
(propagation delay
- bypass mode)
T
STABIL
[12]
Skew, Output to Output
Any clock out
Any clock out or FBOUT
Any clock out or FBOUT
Any clock out or FBOUT
Any clock out or FBOUT
100
pS
pS
nS
nS
75
0.5
0.5
2.2
2.2
REF
3
ns
Stabilization time
FBOUT
1
mS
Table 7. AC Parameters
(V
DD
= V
DDA
= 3.3V ±10%, T
A
= 0
°
C to +85
°
C)
(continued)
[6, 7, 8, 9, 10]
From Output
Under Test
30 pF
500 Ohm
Output
VOH
VOL
2 V
0.4 V
50% VDD
2 V
0.4 V
tr
tf
Load Circuit for Outputs
25 pF load when Fout > 185 MHz
Output Rise/Fall Time
Figure 1. Load Circuit and Voltage Waveforms
[14, 15, 16]
CLKIN
FBIN
FBOUT
Any Y
Any Y
Any Y
t
phase error
t
sk(o)
t
sk(o)
Figure 2. Phase Error and Skew Calculations
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY29350 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2.5V or 3.3V, 200-MHz, 9-Output Clock Driver |
| CY29350_11 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2.5 V or 3.3 V, 200-MHz, 9-Output Clock Driver Nine Clock outputs: Drive up to 18 clock lines |
| CY29350AI | 制造商:Cypress Semiconductor 功能描述:PLL Clock Driver Single 32-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:2.5/3.3V,200MHZ,XTAL/LVCMOS INPUT,9 OUTPUT CLK GEN - Bulk |
| CY29350AIT | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY29350AXI | 功能描述:鎖相環(huán) - PLL 200MHz 9-OP Clk Dvr 2.5/3.3volts RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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