參數(shù)資料
型號(hào): CY28419
英文描述: Clocks and Buffers
中文描述: 時(shí)鐘和緩沖器
文件頁數(shù): 34/48頁
文件大?。?/td> 538K
代理商: CY28419
CY28405-2
Document #: 38-07511 Rev. *C
Page 2 of 16
Frequency Select Pins (FS_A, FS_B)
Host clock frequency selection is achieved by applying the
appropriate logic levels to FS_A and FS_B inputs prior to
VTT_PWRGD# assertion (as seen by the clock synthesizer).
Upon VTT_PWRGD# being sampled low by the clock chip
(indicating processor VTT voltage is stable), the clock chip
samples the FS_A and FS_B input values. For all logic levels
of FS_A and FS_B VTT_PWRGD# employs a one-shot
functionality in that once a valid low on VTT_PWRGD# has
been sampled low, all further VTT_PWRGD#, FS_A, and
FS_B transitions will be ignored. Once “Test Clock Mode” has
been invoked, all further FS_B transitions will be ignored and
FS_A will asynchronously select between the Hi-Z and REF/N
mode. Exiting test mode is accomplished by cycling power
with FS_B in a high or low state.
Pin Description
Pin No.
Name
Type
I/O, SE
Description
1
FS_A/REF_0
This pin is the FS_A at power-up and VTT_PWRGD# = 0, then it
becomes REF_0 output
. (3.3V 14.318-MHz clock output.)
This pin is the FS_B at power-up and VTT_PWRGD# = 0, then it
becomes REF_1 output
. (3.3V 14.318-MHz clock output.)
Crystal Connection or External Reference Frequency Input
. This
pin has dual functions. It can be used as an external 14.318-MHz
crystal connection or as an external reference frequency input.
Crystal Connection
.
Connection for an external 14.318-MHz crystal
output.
CPU Clock Output
.
Differential CPU clock outputs, see
Table 1
for
frequency configuration.l
2
FS_B/REF_1
I/O, SE
4
XIN
I
5
XOUT
O, SE
39, 42,
38, 41,
45, 44
CPUT(0:1),
CPUC(0:1),
CPUT_ITP,
CPUC_ITP
SRCT, SRCC
3V66(2:0)
3V66_3/VCH
O, DIF
36, 35
26, 29, 30
25
O, DIF
O, SE
O, SE
Differential Serial Reference Clock
.
66-MHz Clock Output
.
3.3V 66-MHz clock from internal VCO.
48- or 66-MHz Clock Output
.
3.3V selectable through SMBUS to be
66 MHz or 48 MHz. Default is 66-MHz.
Free Running PCI Output
.
33-MHz clocks divided down from 3V66.
PCI Clock Output
.
33MHz clocks divided down from 3V66.
7, 8, 9
12, 13, 14, 15, 18,
19
22
21
46
PCI_F(0:2)
PCI(0:5)
O, SE
O, SE
USB_48
DOT_48
IREF
O, SE
O, SE
I
Fixed 48-MHz clock output
.
Fixed 48-MHz clock output
.
Current Reference
.
A precision resistor is attached to this pin which
is connected to the internal current reference.
3.3V LVTTL input for PowerDown# active low
.
3.3V LVTTL input is a level sensitive strobe used to latch the
FS[A:E] input (active low)
.
SMBus compatible SDATA
.
SMBus compatible SCLOCK
.
3.3V power supply for PLL
.
Ground for PLL
.
3.3V Power supply for outputs
.
20
33
PD#
VTT_PWRGD#
I, PU
I
32
31
48
47
3, 10, 16, 24, 27,
34, 40
6, 11, 17, 23, 28,
37, 43
SDATA
SCLK
VDDA
VSSA
VDD
I/O, PU
I, PU
PWR
GND
PWR
VSS
GND
Ground for outputs
.
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CY28419OC 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 System Clock w/Diff SRC & CPU Out RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
CY28419OCT 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 System Clock w/Diff SRC & CPU Out RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
CY28419OXC 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 System Clock w/Diff SRC & CPU Out RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
CY28419OXCT 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 System Clock w/Diff SRC & CPU Out RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel
CY28419ZC 制造商:Rochester Electronics LLC 功能描述:CLOCK SYNTHESIZER WITH DIFFERENTIAL SRC & CPU OUT - Bulk