參數(shù)資料
型號(hào): CXD2932AR-2
英文描述: GPS Base Band LSI
中文描述: 全球定位系統(tǒng)基帶芯片
文件頁(yè)數(shù): 14/27頁(yè)
文件大小: 264K
代理商: CXD2932AR-2
14
CXD2931R-9/GA-9
External Data Access Timing (ICS0, ICS1/XROMW = 0)
(1) Read (half-word access/XROMW = 0)
(2) Write (half-word access/XROMW = 0)
No.
(a)
(b)
(c)
(d)
(e)
(f)
(g)
(h)
(i)
(j)
(k)
(l)
Item
Read/write cycle time (Fex: @20MHz)
Address delay time
Chip select fall delay time
Chip select rise delay time
Read signal fall delay time
Read signal rise delay time
Read data setup time
Read data hold time
Write signal fall delay time
Write signal rise delay time
Write data established time
Write data hold time
Min.
2
2
0
0
11
0
0
0
5
Typ.
100
Max.
12
10
10
3
5
1
2
5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
The load capacitance = 30pF.
CLKOUT
(g)
(b)
(c)
(d)
(e)
(f)
(h)
IADR
ICS0, ICS1
IRD
IB
(a)
(16)
CLKOUT
(k)
(b)
(c)
(d)
(i)
(j)
(l)
IADR
ICS0, ICS1
IWR
IB
(a)
(16)
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