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參數(shù)資料
| 型號： | CS96100-CM |
| 英文描述： | Consumer IC |
| 中文描述： | 消費性IC |
| 文件頁數(shù)： | 51/58頁 |
| 文件大小： | 1099K |
| 代理商： | CS96100-CM |
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CS98100
51
6.7
This 16-bit parallel host interface allows the
CS98100 to be a host master, controlling other de-
vices that would be used on the same system. The
interface supports a programmable protocols and
speeds, including multiplexed and non-multiplexed
addressing. Slaves with different protocols can be
connected at the same time, controlled by different
Host Master/ATAPI Interface
chip selects. For example, two chip selects can be
used to control an ATAPI DVD device, while the
other two chip selects can control another ATAPI
or non-ATAPI slave device.
Pin
Signal Name
Type
Description
91, 92, 93, 94
H_CS[3:0]
O
Host Chip Select[3:0]. The host master can be programmed
to use a different protocol for each of the 4 chip selects
69
H_ALE
O
Host address latch enable. Used for modes which multiplex
upper address information onto the data lines
124
H_RD
O
Host Read Request.
123
H_WR
O
Host Write Request.
158
H_RDY
I
Host Ready. Connect to pull-up or pull-down if host is not
used.
66, 67, 68
H_A[2:0]
O
Host Address[2:0].
160, 162, 163, 164,
165, 166, 167, 168,
170, 171, 172, 173,
87, 88, 89, 90
H_D[15:0]
B
Host Data Bus[15:0]. These pins can also output Host
Address during the address phase for multiplexed
address/data mode. Tie together to pull-up or pull-down if
host is not used.
Table 22. Host Master Interface Pin Assignments
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