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參數(shù)資料
| 型號： | CS8406-CZZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁數(shù)： | 9/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC XMITTER DGTL 192KHZ 28TSSOP |
| 標準包裝： | 50 |
| 類型： | 數(shù)字音頻接口發(fā)射器 |
| 應用： | 車載音頻 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-TSSOP（0.173"，4.40mm 寬） |
| 供應商設(shè)備封裝： | 28-TSSOP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 759 (CN2011-ZH PDF) |
| 配用： | 598-1017-ND - BOARD EVAL FOR CS8416 RCVR |
| 其它名稱： | 598-1121-5 |
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DS580F6
17
CS8406
6.2
IC Mode
In IC Mode, SDA is a bidirectional data line. Data is clocked into and out of the part by the clock,SCL. There
is no CS pin. Pins AD0, AD1, and AD2 form the three least significant bits of the chip address and should
be connected to VL or GND as desired.
The signal timing for both a read and write cycle are shown in Figure 11 and Figure 12. A Start condition is
defined as a falling transition of SDA while the clock is high. A Stop condition is a rising transition while the
clock is high. All other transitions of SDA occur while the clock is low. The first byte sent to the CS8406 after
a Start condition consists of a 7 bit chip address field and a R/W bit (high for a read, low for a write). The
upper 4 bits of the 7-bit address field are fixed at 0010. To communicate with a CS8406, the chip address
field, which is the first byte sent to the CS8406, should match 0010 followed by the settings of the AD2, AD1,
and AD0 pins. The eighth bit of the address is the R/W bit. If the operation is a write, the next byte is the
Memory Address Pointer (MAP) which selects the register to be read or written. If the operation is a read,
the contents of the register pointed to by the MAP will be output. Th e MAP automatically increments, so
consecutive registers can read from or written to easily. Each byte is separated by an acknowledge bit
(ACK). The ACK bit is output from the CS8406 after each input byte is read, and is input to the CS8406 from
the microcontroller after each transmitted byte.
Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shown
in Figure 12, the write operation is aborted after the acknowledge for the MAP by sending a stop condition.
4
5
6
7
24 25
SCL
0 0 1
0 AD2 AD1 AD0 0
CHIP ADDRESS (WRITE)
MAP
DATA
DATA +1
START
ACK
STOP
ACK
SDA
6
5
4
3
2
1
7
6
1 0
7
6
1 0
7 6
1 0
0
1
2
3
8
9
12
16 17 18 19
10 11
13 14 15
27 28
26
DATA +n
Figure 11. Control Port Timing, IC Slave Mode Write
SCL
CHIP ADDRESS (WRITE)
MAP
DATA
DATA +1
START
ACK
STOP
ACK
SDA
6
5 4 3 2 1 0
CHIP ADDRESS (READ)
START
7
0
7
0
7
0
NO
16
8 9
12 13 14 15
4 5
6 7
0 1
20 21 22 23 24
26 27 28
2 3
10 11
17 18 19
25
ACK
DATA + n
STOP
0 0 1 0 AD2 AD1 AD0 0
0 0 1 0 AD2 AD1 AD0 1
Figure 12. Control Port Timing, IC Slave Mode Read
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS8406-CZZR | 功能描述:音頻發(fā)送器、接收器、收發(fā)器 IC 192 kHz Digital Audio Transmitter RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數(shù)量:1 最大工作溫度:+ 70 C 接口類型:I2C, SPI 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
| CS8406-DNZ | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:192 kHz Digital Audio Interface Transmitter |
| CS8406-DNZR | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:192 kHz Digital Audio Interface Transmitter |
| CS8406-DS | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:192 KHZ DIGITAL AUDIO INTERFACE TRANSMITTER |
| CS8406-DSZ | 功能描述:音頻發(fā)送器、接收器、收發(fā)器 192kHz Digital Audio Transmitter RoHS:否 制造商:Cirrus Logic 工作電源電壓:3.3 V, 5 V 電源電流:11.8 mA 通道數(shù)量:1 最大工作溫度:+ 70 C 接口類型:I2C, SPI 安裝風格:SMD/SMT 封裝 / 箱體:TSSOP-28 封裝: |
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