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參數(shù)資料
| 型號： | CS517GDR16 |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 176K |
| 代理商： | CS517GDR16 |
C
Applications Information: continued
9
Short Circuit Protection
A lossless hiccup mode short circuit protection feature is
provided, requiring only the soft start capacitor to imple-
ment. If a short circuit condition occurs (V
FFB
< 1V), the V
FFB
low comparator sets the FAULT latch. This causes the top
MOSFET to shut off, disconnecting the regulator from it’s
input voltage. The soft start capacitor is then slowly dis-
charged by a 2μA current source until it reaches it’s lower
0.7V threshold. The regulator will then attempt to restart nor-
mally, operating in it’s extended off time mode with a 50%
duty cycle, while the soft start capacitor is charged with a
60μA charge current.
If the short circuit condition persists, the regulator output
will not achieve the 1V low V
FFB
comparator threshold
before the soft start capacitor is charged to it’s upper 2.5V
threshold. If this happens the cycle will repeat itself until the
short is removed. The soft start charge/ discharge current
ratio sets the duty cycle for the pulses (2μA/ 60μA = 3.3%),
while actual duty cycle is half that due to the extended off
time mode (1.65%).
This protection feature results in less stress to the regulator
components, input power supply, and PC board traces
than occurs with constant current limit protection (see
Figures 10 and 11).
If the short circuit condition is removed, output voltage
will rise above the 1V level, preventing the FAULT latch
from being set, allowing normal operation to resume.
Figure 10: CS5157 demonstration board hiccup mode short circuit pro-
tection. Gate pulses are delivered while the soft start capacitor charges,
and cease during discharge.
Figure 11: Startup with regulator output shorted.
Overvoltage Protection
Overvoltage protection (OVP) is provided as result of the
normal operation of the V
2
TM
control topology and requires
no additional external components. The control loop
responds to an overvoltage condition within 100ns, causing
the top MOSFET to shut off, disconnecting the regulator
from it’s input voltage. The bottom MOSFET is then acti-
vated, resulting in a “crowbar” action to clamp the output
voltage and prevent damage to the load (see Figures 12 and
13). The regulator will remain in this state until the over-
voltage condition ceases or the input voltage is pulled low.
The bottom FET and board trace must be properly
designed to implement the OVP function.
Figure 12: OV P response to an input-to-output short circuit by immedi-
ately providing 0% duty cycle, crow-barring the input voltage to
ground.
Trace 4 = 5V from PC Power Supply (5V/div.)
Trace1 = Regulator Output Voltage (1V/div.)
Trace 2 = Inductor Switching Node (5V/div.)
Trace 4 = 5V from PC Power Supply (2V/div.)
Trace 2 = Inductor Switching Node (2V/div.)
Trace 4 - 5V Supply Voltage (2V/div.)
Trace 3 - Soft Start Timing Capacitor (1V/div.)
Trace 2 - Inductor Switching Node (2V/div.)
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