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參數(shù)資料
| 型號： | CS517GDR16 |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數(shù)： | 5/16頁 |
| 文件大?。?/td> | 176K |
| 代理商： | CS517GDR16 |
5
C
Block Diagram
Q
V
ID1
V
ID2
V
ID3
V
ID4
V
CC1
SS
COMP
V
FB
V
ID0
LGnd
V
FFB
V
CC2
V
GATE(H)
PGnd
V
GATE(L)
-
+
5 BIT
DAC
C
OFF
Slow Feedback
On-Time
Timeout
V
CC1
R
Q
S
C
One Shot
PWM
SS High
Latch
2.5V
Error
Fast Feedback
-
+
V
Monitor
Comparator
-
+
-
+
-
+
-
+
FFB
Low
V
PWM
SS Low
R
Q
S
Q
R
Q
S
2
μ
A
5V
60
μ
A
Timeout
Off-Time
Timeout
TiTimer
(30
μ
s)
Edge Triggered
Timeout
3.90V
3.85V
FAULT
FAULT
GATE(H) = ON
GATE(H) = OFF
PGnd
PWM
1V
0.7V
Package Pin Description: continued
PACK AGE PIN #
PIN SYMBOL
FUNCTION
16L SO Narrow
11
PGnd
High current ground for the IC. The MOSFET drivers are referenced to
this pin. Input capacitor ground and the source of lower FET should be
tied to this pin.
12
V
GATE(L)
V
CC1
LGnd
Low FET driver pin capable of 1.5A peak switching current.
13
Input power for the IC and low side gate driver.
14
Signal ground for the IC. All control circuits are referenced to this pin.
15
COMP
Error amplifier compensation pin. A capacitor to ground should be
provided externally to compensate the amplifier.
16
V
FB
Error amplifier DC feedback input. This is the master voltage feedback
which sets the output voltage. This pin can be connected directly to the
output or a remote sense trace.
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