參數資料
| 型號： | CS4340-CZZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁數： | 13/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAC 24BIT 96KHZ 101DB 16TSSOP |
| 標準包裝： | 96 |
| 位數： | 24 |
| 數據接口： | 串行 |
| 轉換器數目： | 2 |
| 電壓電源： | 單電源 |
| 功率耗散（最大）： | 90mW |
| 工作溫度： | -10°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 管件 |
| 輸出數目和類型： | 2 電壓，單極 |
| 采樣率（每秒）： | 96k |
| 配用： | CDB4340A-ND - EVALUATION BOARD FOR CS4340A |
| 其它名稱： | 598-1049-5 |
CS4340
20
DS297F3
4.7
Mute Control
The Mute Control pin goes high during power-up initialization, reset, or if the MCLK to LRCK ratio is incorrect. The
pin will also go high following the reception of 8192 consecutive audio samples of static 0 or -1 on both the left and
right channels. A single sample of non-zero data on either channel will cause the Mute Control pin to go low. This
pin is intended to be used as a control for an external mute circuit to prevent the clicks and pops that can occur in
any single-ended single supply system.
Use of the Mute Control function is not mandatory but recommended for designs requiring the absolute minimum in
extraneous clicks and pops. Also, use of the Mute Control function can enable the system designer to achieve idle
channel noise/signal-to-noise ratios which are only limited by the external mute circuit. See the CDB4340 data sheet
for a suggested mute circuit.
4.8
Grounding and Power Supply Arrangements
As with any high resolution converter, the CS4340 requires careful attention to power supply and grounding arrange-
ments if its potential performance is to be realized. Figure 14 shows the recommended power arrangements, with
VA connected to a clean supply. If the ground planes are split between digital ground and analog ground, REF_GND
& AGND should be connected to the analog ground plane.
Decoupling capacitors should be as close to the DAC as possible, with the low value ceramic capacitor being the
closest. To further minimize impedance, these capacitors should be located on the same layer as the DAC.
All signals, especially clocks, should be kept away from the FILT+ and VQ pins in order to avoid unwanted coupling
into the modulators. The FILT+ and VQ decoupling capacitors, particularly the 0.1 F, must be positioned to mini-
mize the electrical path from FILT+ and REF_GND (as well as VQ and REF_GND), and should also be located on
the same layer as the DAC. The CDB4340 evaluation board demonstrates the optimum layout and power supply
arrangements.
相關PDF資料 |
PDF描述 |
|---|---|
| CS4341-CZZ | IC DAC STER 24BIT 96KHZ 16TSSOP |
| CS4341A-KSZ | IC DAC STER 24BIT 192KHZ 16SOIC |
| CS4351-DZZ | IC DAC STER 112DB 192KHZ 20TSSOP |
| CS4352-DZZ | IC DAC STER 102DB 192KHZ 20TSSOP |
| CS4354-CSZ | IC DAC 24BIT SRL 14SOIC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CS4340-CZZR | 功能描述:數模轉換器- DAC IC 24Bit 96kHz 101dB Stereo DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| CS4340-DS | 制造商:Cirrus Logic 功能描述:DAC 2CH DELTA-SIGMA 24BIT 16SOIC - Rail/Tube |
| CS4340-DSZ | 功能描述:數模轉換器- DAC IC 24Bit 96kHz 101dB Stereo DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| CS4340-DSZR | 功能描述:數模轉換器- DAC IC 24Bit 96kHz 101dB Stereo DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
| CS4340-KS | 功能描述:數模轉換器- DAC IC 24Bit 96kHz 101dB Stereo DAC RoHS:否 制造商:Texas Instruments 轉換器數量:1 DAC 輸出端數量:1 轉換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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