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| 型號： | CS2300P-DZZR |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | PLL合成/DDS/VCOs |
| 中文描述： | PHASE LOCKED LOOP, 30 MHz, PDSO10 |
| 封裝： | 3 MM, LEAD FREE, MO-187, MSOP-10 |
| 文件頁數(shù)： | 15/26頁 |
| 文件大?。?/td> | 434K |
| 代理商： | CS2300P-DZZR |
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CS2300-OTP
22
DS844F2
7. CALCULATING THE USER DEFINED RATIO
Note:
The software for use with the evaluation kit has built in tools to aid in calculating and converting the User
Defined Ratio. This section is for those who would like to know more about how the User Defined Ratio is
calculated and stored.
Most calculators do not interpret the fixed point binary representation which the CS2300-OTP uses to define the
output to input clock ratio (see Section 5.4.1 on page 13); However, with a simple conversion we can use these tools
to generate a binary or hex value for Ratio0-3 to be stored in one time programmable memory. Please see “Program-
ming Information” on page 23 for more details on programming.
7.1
High Resolution 12.20 Format
To calculate the User Defined Ratio (RUD) to store in the register(s), divide the desired output clock frequen-
cy by the given input clock (CLK_IN). Then multiply the desired ratio by the scaling factor of 220 to get the
scaled decimal representation; then use the decimal to binary/hex conversion function on a calculator and
write to the register. A few examples have been provided in Table 3.
Table 3. Example 12.20 R-Values
7.2
High Multiplication 20.12 Format
To calculate the User Defined Ratio (RUD) to store in the register(s), divide the desired output clock frequen-
cy by the given input clock (CLK_IN). Then multiply the desired ratio by the scaling factor of 212 to get the
scaled decimal representation; then use the decimal to binary/hex conversion function on a calculator and
write to the register. A few examples have been provided in Table 4.
Table 4. Example 20.12 R-Values
Desired Output to Input Clock Ratio
(output clock/input clock)
Scaled Decimal
Representation =
(output clock/input clock)
220
Hex Representation of
Binary RUD
12.288 MHz/10 MHz=1.2288
1288490
00 13 A9 2A
11.2896 MHz/44.1 kHz=256
268435456
10 00 00 00
Desired Output to Input Clock Ratio
(output clock/input clock)
Scaled Decimal
Representation =
(output clock/input clock)
212
Hex Representation of
Binary RUD
12.288 MHz/60 Hz=204,800
838860800
32 00 00 00
11.2896 MHz/59.97 Hz =188254.127...
771088904
2D F5 E2 08
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| CS2300P-EZZ | 功能描述:IC - GENERAL PURPOSE PLL CRYSTAL 制造商:cirrus logic inc. 系列:* 零件狀態(tài):在售 標(biāo)準(zhǔn)包裝:96 |
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