參數(shù)資料
型號(hào): CS1301
文件頁(yè)數(shù): 19/25頁(yè)
文件大?。?/td> 542K
代理商: CS1301
Revision 2.2
19
www.national.com
G
Signal Definitions
(Continued)
2.2.7
Audio Out Interface Signals
Signal Name
Ball
No.
Type
Description
AO_OSCLK
B14
O
Over-Sampling Clock
. This output can be programmed to emit any fre-
quency up to 40 MHz, with a sub-Hertz resolution. It is intended for use
as the 256 or 384 f
s
over-sampling clock by the external D/A conversion
subsystem. A board-level 27 to 33
series resistor is recommended to
reduce ringing.
AO_SCK
A14
I/O
Serial Clock
. When the Audio Out (AO) module is programmed to act as
the serial interface timing slave (power-up default), AO_SCK acts as an
input. It receives the Serial Clock from the external audio D/A sub-
system. The clock is treated as fully asynchronous to the
CS1301/CS1311 main clock.
When the AO module is programmed to act as the serial interface timing
master, AO_SCK acts as an output. It drives the serial clock for the
external audio D/A subsystem. The clock frequency is a programmable
integral divisor of the AO_OSCLK frequency. AO_SCK is limited to 22
MHz. The sample rate of valid samples embedded within the serial
stream is variable. If used as an output, a board-level 27 to 33
series
resistor is recommended to reduce ringing.
AO_SD1
B13
O
Serial Data Buses
. Serial data to external stereo audio D/A subsystem.
The timing of transitions on this output is determined by the
CLOCK_EDGE bit in the AO_SERIAL register, and can be on positive or
negative AO_SCK edges.
AO_SD2
A13
AO_SD3
C12
AO_SD4
B12
AO_WS
A15
I/O
Word-Select or Frame synchronization
. Signal from/to the external
D/A subsystem. Each audio channel receives 1 sample for every WS
period.
When the AO module is programmed as the serial interface timing slave
(power-up default), AO_WS acts as an input. AO_WS is sampled on the
opposite AO_SCK edge from which AO_SDx are asserted.
When the AO module is programmed as serial interface timing master,
AO_WS acts as an output. AO_WS is asserted on the same AO_SCK
edge as AO_SDx.
Note:
The AO module always acts as sender, but can be master or slave for D/A timing.
2.2.8
S/PDIF Interface Signals
Signal Name
Ball
No.
Type
Description
SPDO
A12
O
S/PDIF Data Out.
Self-clocking serial data stream as per IEC958, with
1937 extensions. Note that the low impedance output buffer requires a
27 to 33
series terminator close to CS1301/CS1311 in order to match
the board trace impedance. This series terminator must be part of the
voltage divider needed to create the coaxial output through the AC isola-
tion transformer.
相關(guān)PDF資料
PDF描述
CS1311
CS142 Phase Control Thyristors
CS1501-7R 100 Watt DC-DC Converters
CS1001-7R 100 Watt DC-DC Converters
CS1301-7R 100 Watt DC-DC Converters
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
C-S-130-14T 制造商:MOLEX 制造商全稱:Molex Electronics Ltd. 功能描述:Krimptite? Temp-Term Ring Tongue Terminal for 10 to 12 AWG Wire, Stud Size 1/4,Mylar Tape Carrier
CS1301-7R 功能描述:EURO-CASSETTE 100W 12V RoHS:否 類別:電源 - 外部/內(nèi)部(非板載) >> DC DC Converters 系列:* 標(biāo)準(zhǔn)包裝:1 系列:Quint 類型:隔離 輸入電壓:24V 輸出:24V 輸出數(shù):1 輸出 - 1 @ 電流(最大):24 VDC @ 50A 輸出 - 2 @ 電流(最大):- 輸出 - 3 @ 電流(最大):- 輸出 - 4 @ 電流(最大):- 功率(瓦特):1200W 安裝類型:底座安裝 工作溫度:0°C ~ 40°C 效率:- 封裝/外殼:模塊 尺寸/尺寸:4.33" L x 9.09" W x 6.14" H(110mm x 231mm x 156mm) 包裝:散裝 電源(瓦特)- 最大:1200W 批準(zhǔn):- 其它名稱:277-69722866365-NDQUINT-BAT/24DC/12AH
CS1301-9ER 制造商:Power-One 功能描述:DCDC - Bulk
CS1301-9ERB1 功能描述:DC/DC CONVERTER 12V 8A 制造商:bel power solutions 系列:Melcher S 包裝:散裝 零件狀態(tài):有效 類型:隔離 電壓 - 輸入:28 ~ 140 V 輸出:12V 輸出數(shù):1 不同電流時(shí)的輸出(最大值) - 1:12 VDC @ 8A 不同電流時(shí)的輸出(最大值) - 2:- 不同電流時(shí)的輸出(最大值) - 3:- 不同電流時(shí)的輸出(最大值) - 4:- 功率(W):96W 應(yīng)用:ITE(商業(yè)),鐵路 安裝類型:底座安裝 工作溫度:-40°C ~ 71°C 效率:83% 封裝/外殼:- 大小/尺寸:6.73" 長(zhǎng) x 4.37" 寬 x 1.86" 高(171.0mm x 111.0mm x 47.2mm) 功率(W) - 最大值:96W 認(rèn)可:cCSAus,CE,TUV 標(biāo)準(zhǔn)包裝:1
CS13035 制造商:UNBRANDED 功能描述:HEADSET + MIC FOLDABLE