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| 型號： | COP8SDR9LVA8 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-Bit CMOS Flash Based Microcontroller with 32k Memory, Virtual EEPROM and Brownout |
| 中文描述： | 8-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQCC68 |
| 封裝： | PLASTIC, LCC-68 |
| 文件頁數(shù)： | 16/80頁 |
| 文件大?。?/td> | 972K |
| 代理商： | COP8SDR9LVA8 |
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8.0 Electrical Characteristics
AC Electrical Characteristics (40C
≤
T
A
≤
+125C)
(Continued)
Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.
(Continued)
Parameter
Conditions
Min
1
1
1
1
1
Typ
Max
Units
t
C
t
C
t
C
Interrupt Input Low Time
Timer 1 Input High Time
Timer 1 Input Low Time
Timer 2, 3 Input High Time (Note 6)
Timer 2, 3 Input Low Time (Note 6)
Output Pulse Width
Timer 2, 3 Output High Time
Timer 2, 3 Output Low Time
USART Bit Time when using External
CKX
USART CKX Frequency when being
Driven by Internal Baud Rate Generator
Reset Pulse Width
t
C
= instruction cycle time.
Note 9:
Maximum rate of voltage change must be
<
0.5 V/ms.
Note 10:
Supply and IDLE currents are measured with CKI driven with a square wave Oscillator, CKO driven 180 out of phase with CKI, inputs connected to V
CC
and outputs driven low but not connected to a load.
Note 11:
The HALT mode will stop CKI from oscillating. Measurement of I
DD
HALT is done with device neither sourcing nor sinking current; with L. A. B, C, E, F,
G0, and G2–G5 programmed as low outputs and not driving a load; all D outputs programmed low and not driving a load; all inputs tied to V
CC
; A/D converter and
clock monitor and BOR disabled. Parameter refers to HALT mode entered via setting bit 7 of the G Port data register.
Note 12:
Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages
>
V
CC
and the pins will have sink current to V
CC
when biased at voltages
>
V
CC
(the pins do not have source current when biased at a voltage below V
). These two pins will not latch up. The voltage at the pins
must be limited to
<
(V
CC
+ 7V.
WARNING: Voltages in excess of 14V will cause damage to the pins. This warning excludes ESD transients.
Note 13:
If timer is in high speed mode, the minimum time is 1 MCLK. If timer is not in high speed mode, the minimum time is 1 t
C
.
Note 14:
Absolute Maximum Ratings should not be exceeded.
Note 15:
V
cc
must be valid and stable before G6 is raised to a high voltage.
MCLK or t
C
MCLK or t
C
150
150
6 CKI
periods
ns
ns
2
MHz
0.5
t
C
10138905
FIGURE 1. MICROWIRE/PLUS Timing
C
www.national.com
16
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