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參數(shù)資料
| 型號： | CM3121-02SH |
| 廠商： | California Micro Devices Corporation |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Dual Linear Voltage Regulator for DDR-I and DDR-II Memory |
| 中文描述： | 雙線性穩(wěn)壓器，用于DDR I和DDR - II內(nèi)存 |
| 文件頁數(shù)： | 4/11頁 |
| 文件大?。?/td> | 219K |
| 代理商： | CM3121-02SH |
2004 California Micro Devices Corp. All rights reserved.
4
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
●
Fax: 408.263.7846
●
www.calmicro.com
11/12/04
CM3121
PRELIMINARY
Specifications (cont’d)
DDR-I Specifications
ELECTRICAL OPERATING CHARACTERISTICS
(SEE NOTE1)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
General Parameters
T
OVER
T
HYST
I
CCN
Shutdown Junction Temperature
-
150
-
°C
Junction Temp Hysterisis
IC in shutdown
-
25
-
°C
Normal Mode V
CC
Supply
Current
EN_DDR = logic "0",
EN_CORE =logic "0"
700
1100
μ
A
I
CCQ
Shutdown Mode V
CC
Supply
Current
EN_DDR = logic "1",
V
DDQ
= 0V, V
TT
= 0V
V
CC
=3.3V
V
CC
=3.3V
I
DDQ
= 10mA
2
10
μ
A
V
IH
V
IL
UVLO
EN_DDR Input High Threshold
2.0
V
EN_DDR Input Low Threshold
0.4
V
Under Voltage Lock-Out
1.8
V
t
RISE
V
DDQ
Rise TIme
V
CC
= 3.3V, C
DDQ
= 10
μ
F
0.5
ms
V
DDQ
Regulator Parameters
V
CC MIN
Input Voltage
V
DDQ
= 2.5V, I
DDQ
= 1.5A,
SENSE_V
DDQ
= 0V, Note 2
I
DDQ
= 0.01A, 2.8V
≤
V
CC
≤
3.6V,
SENSE_V
DDQ
= 0V, Note 2
V
CC
= 3.6V, SENSE_V
DDQ
tied to
external resistors R1 and R2, Note 2
2.80
V
V
DDQ DEF
Default Output Voltage Range
2.45
2.50
2.55
V
V
DDQ ADJ
Adjustable Output Voltage
Range
1.6
2.8
V
V
DDQ LD
Load Regulation
T
A
= 25°C, V
CC
= 3.3V,
0.01A
≤
I
DDQ
≤
1.0A, Note 2
T
A
= 25°C, I
DDQ
= 0.01A,
2.8V
≤
V
CC
≤
3.6V, Note 2
BW = 10Hz - 100kHz, C
DDQ
= 10
μ
F
Note 2
-
-
2.5
%
V
DDQ LINE
Line Regulation
-1.0
-
1.0
%
e
N DDQ
I
DDQ LIM
I
DDQ SC
Output Noise Voltage
49
μ
Vrms
Current Limit
1.7
2.0
A
Short Circuit Current
V
DDQ
< 0.3V
0.5
A
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