參數(shù)資料
型號(hào)： CM3121-02SB
廠商： California Micro Devices Corporation
元件分類： 基準(zhǔn)電壓源/電流源
英文描述： Dual Linear Voltage Regulator for DDR-I and DDR-II Memory
中文描述： 雙線性穩(wěn)壓器，用于DDR I和DDR - II內(nèi)存
文件頁(yè)數(shù)： 10/11頁(yè)
文件大?。?/td> 219K
代理商： CM3121-02SB
2004 California Micro Devices Corp. All rights reserved.
10
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
●
Fax: 408.263.7846
●
www.calmicro.com
11/12/04
CM3121
PRELIMINARY
Application Information (cont’d)
DDR-II Application
For DDR-II applications, it is recommended that a
lower input voltage than 3.3V be applied to reduce
overall power dissipation. The input voltage can be as
low as 2.1V worst case, so an input voltage of 2.4V
±
10% would be the best input voltage for the least
power dissipation. Also to obtain a V
DDQ
voltage of
1.8V, a resistor divider comprising R1 = 56K and R2 =
130K would result in an output voltage of 1.79V for
V
DDQ
, and a V
TT
of 0.895V.
The maximum current I
DDQ
for the CM3121 in a DDR-
II application is 1.5V, and the maximum for I
TT
is 0.3V.
This should be satisfactory for most DDR- II applica-
tions because the DDR- II memories do not require a
V
TT
, so the only current needed is for either a refer-
ence voltage or a controller input.
.
Figure 5. Minimal CM3132 DDR-II power solution.
V
REF
R
R
FAULT
V
TT
=0.90V
V
DDQ
REGULATOR
V
TT
REGULATOR
EN_DDR
V
CC
GND
C
DDQ
DDR
MEMORY
CPU
CORE
+ I/O
C
CC
C
TT
Enable DDR
Memory #
2.15V to 3.6V
SENSE V
TT
V
TT
V
DDQ
SENSE
V
DDQ
CURRENT LIMIT
OVERTEMP
LOW INPUT
R1
R2
V
DDQ
=1.8V*
* V
DDQ
= 1.25V x
R2
+
R2
R1
相關(guān)PDF資料
PDF描述
CM3121-02SH Dual Linear Voltage Regulator for DDR-I and DDR-II Memory
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CM3121-02SH 制造商:CALMIRCO 制造商全稱:California Micro Devices Corp 功能描述:Dual Linear Voltage Regulator for DDR-I and DDR-II Memory
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