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參數(shù)資料
| 型號(hào)： | CLC935 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 12-bit, 15MSPS A/D Converter |
| 中文描述： | 12位，15MSPS A / D轉(zhuǎn)換 |
| 文件頁(yè)數(shù)： | 6/12頁(yè) |
| 文件大?。?/td> | 271K |
| 代理商： | CLC935 |
http://www.national.com
6
Overdrive Recovery Plots
These plots indicate ADC time domain settling from a
50% overdrive condition. A very fast, +1.5V or -1.5V to
0.00V pulse, with a period slightly shorter (100ps) than
that of the CONVERT clock, is used as the input source.
The ADC is therefore “slipped” through the input wave
form and the output data is plotted after being smoothed
using a 5 point sliding average. The slip rate (period
difference between clock and input) and data point
number are used to generate the time axis. For the sake
of plot resolution, only fine settling is shown.
Analog-to-Digital converters are specified in many ways.
As a component achieves higher performance, its
specifications and their definitions can become more
critical. Fortunately, the vast number of converter
applications can generally be placed into one of two
classes. These are processed data and non-processed
data applications. The distinction seems quite simple but
the split implies a completely different approach in
specifying A/D converters for a given application.
The processed data area includes the frequency
domain applications which employ Fourier processing
(FFT). Also in this category are the highly averaged
applications, usually concerned with low noise. In each
case, the converter’s data is averaged or convolved
mathematically. This processing reduces the apparent
noise level in the output data. For FFTs, the noise is
simply spread over a large number of frequency
bins. For simple averaging approaches, the Gaussian
distribution of noise is greatly reduced, appearing
to increase the converter’s resolution. Processed
applications include radar, network and spectrum
analyzers, communications receivers, etc.
The non-processed applications tend to take the convert-
er’s data in its original form with very little processing.
This means that the noise reduction benefits of the
processed applications are not seen. The non-
processed area is composed primarily of time domain
applications like imaging, DSO’s, ultrasound, etc.
The processed vs. non-processed issue has several
implications in terms of converter specifications. For the
non-processed (time domain) systems the dominant
converter specifications deal with noise (SNR) and
converter accuracy (DNL). The converter’s quantization
noise and input stage noise dominate converter
accuracy . The harmonic distortion (primarily INL) of the
converter is generally of little interest given that most time
domain applications present data for visual analysis and
tend to focus on “l(fā)ocal” accuracy rather than over the
full input range. “Local” accuracy is best described
through the standard noise measurements, such as SNR
and DNL.
In the frequency domain application areas, the noise of
the converter is processed to the point where, for almost
all systems, it is no longer of issue. This is manifested as
a reduction in the apparent noise floor. The actual RMS
noise is not reduced, but is spread over more and more
frequency bins as processing levels are increased.
Unfortunately, the harmonic distortion performance of the
converter is not affected by increased processing. This
makes the harmonic performance, or more specifically
the spurious performance, the dominant error source
for frequency domain applications. SFDR becomes
the dominant specification for determining converter
performance in the frequency domain.
Signal-to-Noise Ratio (SNR)
is the ratio of the power
contained in the fundamental signal compared to the
power contained in the entire noise floor. That is to say
all individual noise components are added together to
arrive at an integrated noise power. For SNR, harmonic
power is excluded from the noise measurement. SNR is
particularly important in time domain applications like
digital image processing and infrared imaging, where
conversion accuracy can be heavily degraded by
integrated noise.
Signal-to-Noise-and-Distortion (SINAD)
is the ratio of
the fundamental signal power to the power at all other
frequencies. This includes all noise as well as all
harmonics. SINAD is a worst case specification for A/D
converters, combining variables from both frequency and
time domains. The value of SINAD in high-performance
converter applications is not clear since it does not
accurately predict the best converter for a given
application. Because data converter applications tend to
fall into either noise-sensitive time-domain applications
or distortion-sensitive frequency-domain applications,
SINAD is not specified for the CLC935 data converter.
Total Harmonic Distortion (THD)
is the combined
power of a specified number of harmonics, compared to
the power of the fundamental signal. Harmonics are
located at predictable frequencies, spaced at integer
multiples of the fundamental signal. For example, a
1MHz fundamental would generate harmonics at 2MHz,
3MHz, 4MHz, ... and so on. In practice, only the first five
harmonics contribute significantly to THD, although more
may be included in the measurement. THD does not
tend to apply well in frequency domain applications which
are by their nature very SFDR oriented. In time domain
applications, THD is indicative of full-scale input range
distortion, however the high-performance time domain
applications are generally most interested in local
distortion performance. Local distortion and accuracy is
dominated by DNL. The use of THD for applications
requiring local performance is not likely to yield accurate
or repeatable results and therefore THD does not appear
in the CLC935 specifications.
Understanding A/D Dynamic Specifications
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CLC935B8C | 12-bit, 15MSPS A/D Converter |
| CLC935BC | 12-bit, 15MSPS A/D Converter |
| CLC949 | Very Low-Power, 12-Bit, 20MSPS Monolithic A/D Convertter |
| CLC949ACQ | Very Low-Power, 12-Bit, 20MSPS Monolithic A/D Convertter |
| CLC949AJQ | Very Low-Power, 12-Bit, 20MSPS Monolithic A/D Convertter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CLC935A8C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 12-Bit |
| CLC935A8CX | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 12-Bit |
| CLC935AC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog-to-Digital Converter， 12-Bit |
| CLC935B8C | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-bit, 15MSPS A/D Converter |
| CLC935BC | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-bit, 15MSPS A/D Converter |
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