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參數(shù)資料
| 型號： | CLC5523IN |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Low-Power, Variable Gain Amplifier |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDIP8 |
| 封裝： | PLASTIC, MDIP-8 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 154K |
| 代理商： | CLC5523IN |
5
http://www.national.com
The key features of the CLC5523 are:
I
Low Power
I
Broad voltage controlled gain and attenuation
range
I
Bandwidth independent, resistor programmable
gain range
I
Broad signal and gain control bandwidths
I
Frequency response may be adjusted with R
f
I
High Impedance signal and gain control Inputs
The CLC5523 combines a closed loop input buffer, a volt-
age controlled variable gain cell and an output amplifier.
The input buffer is a transconductance stage whose gain
is set by the gain setting resistor, R
g
. The output amplifi-
er is a current feedback op amp and is configured as a
transimpedance stage whose gain is set by, and equal to,
the feedback resistor, R
f
. The maximum gain, A
vmax
, of
the CLC5523 is defined by the ratio; R
f
/ R
g
.
gain control input (V
G
) is adjusted over its 0 to 2V range,
the gain is adjusted over a range of 80dB relative to the
maximum set gain.
As the
Setting the CLC5523 Maximum Gain
Although the CLC5523 is specified at A
vmax
= 10, the
recommended A
vmax
varies between 2 and 100. Higher
gains are possible but usually impractical due to
output offsets, noise and distortion. When varying A
vmax
several tradeoffs are made:
R
g
: determines the input voltage range
R
f
: determines overall bandwidth
The amount of current which the input buffer can source
into R
g
is limited and is specified in the I
Rgmax
spec. This
sets the maximum input voltage:
The effects of maximum input range on harmonic distortion
are illustrated in the Input Harmonic Distortion plot.
Variations in R
g
will also have an effect on the small
signal bandwidth due to its loading of the input buffer and
can be seen in Frequency Response vs. R
g
. Changes in
R
f
will have a more dramatic effect on the small signal
bandwidth. The output amplifier of the CLC5523 is a
current feedback amplifier(CFA) and its bandwidth is
determined by R
f
. As with any CFA, doubling the feed-
back resistor will roughly cut the bandwidth of the device
in half (refer to the plot Frequency Response vs. R
f
). For
more
information
covering
a basic tutorial, OA-20, Current Feedback Myths
Debunked or a more rigorous analysis, OA-13, Current
Feedback Amplifier Loop Gain Analysis and Performance
Enhancements
CFA’s,
there
is
Using the CLC5523 in AGC Applications
In AGC applications, the control loop forces the CLC5523
to have a fixed output amplitude. The input amplitude will
vary over a wide range and this can be the issue that
limits dynamic range.
At high input amplitudes, the
distortion due to the input buffer driving R
g
may exceed
that which is produced by the output amplifier driving the
load. In the plot, Harmonic Distortion vs. Gain second
and third harmonic distortion are plotted over a gain
range of nearly 40dB for a fixed output amplitude
of 100mV
pp
in the specified configuration, R
f
= 1k,
R
g
= 100
W
. When the gain is adjusted to 0.1 (i.e. 40dB
down from A
vmax
), the input amplitude would be 1V
pp
and
we can see the distortion is at its worst at this gain. If the
output amplitude of the AGC were to be raised above
100mV, the input amplitudes for gains 40dB down from
A
vmax
would be even higher and the distortion would
degrade further. It is for this reason that we recommend
lower output amplitudes if wide gain ranges are desired.
Using a post-amp like the CLC404 or CLC409 would be
the best way to preserve dynamic range and yield output
amplitudes much higher than 100mV
pp
.
Another way of addressing distortion performance and
its limitations on dynamic range, would be to raise the
value of R
g
. Just like any other high-speed amplifier, by
increasing the load resistance, and therefore decreasing
the demanded load current, the distortion performance
will be improved in most cases. With an increased R
g
, R
f
will also have to be increased to keep the same A
vmax
and this will decrease the overall bandwidth.
Gain Partitioning
If high levels of gain are needed, gain partitioning should
be considered.
Figure 1: Gain Partitioning
The maximum gain range for this circuit is given by the
following equation:
CLC5523 Operation
A
R
R
vmax
f
g
=
V (max)
I
R
R max
g
=
×
CLC5523
R
f
R
g
2
3
4
1
V
G
6
7
25
W
+
CLC425
-
V
in
R
1
R
2
25
W
R
c
V
o
maximum gain
1
R
R
R
R
2
1
f
g
=
+
è
×
è
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