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參數(shù)資料
| 型號： | CH7202 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | MPEG to TV Encoder with 8-bit Input |
| 中文描述： | 電視的MPEG編碼器8位輸入 |
| 文件頁數(shù)： | 15/16頁 |
| 文件大小： | 110K |
| 代理商： | CH7202 |
CHRONTEL
CH7202
201-0000-030 Rev 2.0, 6/2/99
15
Electrical Specifications (continued)
Table 8 AC Characteristics
Symbol
Description
Min
Typ
Max
Units
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
2XPCLK
37
ns
2XPCLK high time
14.8
22.2
ns
Pixel/Sync setup time
6
ns
Pixel/Sync hold time
3
ns
Sync active delay time
3
ns
Sync inactive delay time
17
ns
HSYNC* to VSYNC* delay
30
30
ns
HSYNC* to VSYNC* field detect
15.6
μ
S
μ
S
HSYNC* to VSYNC*
16.1
HSYNC* pulse width
64 x t
1
2.0
ns
VSYNC* pulse width
Hor. lines
Test
Conditions:
Unless otherwise specified, the testing conditions are the same as in Table 5, “Recommended Operating Conditions,”
on page 14. TTL input values are 0 – 3V, with input rise / fall times < 3 ns, measured between the
V
IL
and
V
IH
. Timing
reference points at 50% for non-TTL inputs and outputs. TTL reference points at 1.5V for inputs and outputs. Analog
output load < 10 pF.
Since the CH7202 does not have a pixel clock input, all input signal timing is chosen with respect to the output clock
timing of 2XPCLK and PCLK. PCLK can be used at the “Qualifying” clock for certain MPEG decoders.
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