參數(shù)資料
型號: CDP68HC68S1
廠商: Intersil Corporation
英文描述: Serial Multiplexed Bus Interface(串行多路總線接口)
中文描述: 復(fù)用串行總線接口(串行多路總線接口)
文件頁數(shù): 3/14頁
文件大?。?/td> 72K
代理商: CDP68HC68S1
6-86
Specifications CDP68HC68S1
Absolute Maximum Ratings
Thermal Information
Supply Voltage (V
DD
) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +7.0V
Input Voltage (V
IN
) . . . . . . . . . . . . . . . . . . V
SS
-0.3V to V
DD
+0.3V
DC
DC Input Current (I
IN
)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±
10mA
Thermal Resistance
Plastic DIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . .100
o
C/W
Plastic SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . .120
o
C/W
Storage Temperature Range (T
STG
) . . . . . . . . . . . .-55
o
C to +125
o
C
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +265
o
C
θ
JA
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Operating Conditions
Operating Temperature (T
A
) . . . . . . . . . . . . . . . . . . -40
o
C to +105
o
C
DC Operating Voltage Range (V
DD
) . . . . . . . . . . . . . . . . +4V to +7V
DC Electrical Specifications
T
A
= -40
o
C to +105
o
C Unless Otherwise Noted. External Bias (V
O
) shall be 1.8V to 3.13V Unless
Otherwise Noted.
PARAMETERS
SYMBOLS
TEST CONDITIONS
MIN
MAX
UNITS
SIGNAL I/O SECTION
Output Voltage High Level
V
OL
Open Circuit
-
0.05
V
DC
Output Voltage Low Level
V
OH
Open Circuit
V
DD
-0.05
-
V
DC
Input Voltage Low Level
V
IL
-
0.3V
DD
V
DC
Input Voltage High Level
V
IH
0.7V
DD
-
V
DC
Output High Drive (Source) Current
(REC Pin)
I
OH
V
OH
= 4.6V, V
DD
= 5V
-0.12
-
mA
Output High Drive (Source) Current
(IDLE, Control Pins)
I
OH
V
OH
= 4.6V, V
DD
= 5V
-0.04
-
mA
Output Low Drive (Sink) Current
(IDLE, Control, REC)
I
OL
V
OH
= 0.4V, V
DD
= 5V
0.36
-
mA
DIFFERENTIAL TRANSCEIVER (SEE FIGURE 4) TRANSMITTER
BUS+
I
AOL
V
O
= V
DD
/2, R
L
= 120
2.75
-
mA
I
AOH
V
O
= V
DD
/2, R
L
= 120
-1.0
1.0
μ
A
BUS-
I
BOL
V
O
= V
DD
/2, R
L
= 120
-
-2.75
mA
I
BOH
V
O
= V
DD
/2, R
L
= 120
-1.0
1.0
μ
A
I
AOL
- I
BOL
Match
I
M
V
O
= V
DD
/2, R
L
= 120
,
V
DD
= 5V
±
0.5V
-
5
%
Output Rise Time (BUS+)
t
R
V
DD
= 5V, C
L
= 25pF
-
1.5
μ
s
Output Fall Time (BUS-)
t
F
V
DD
= 5V, C
L
= 25pF
-
1.5
μ
s
Transition match (50% Point)
t
M
V
DD
= 5V, C
L
= 25pF
-50
50
ns
RECEIVER
Differential Sensitivity
V
IDH
V
O
= 2.5V, R
L
= 120
, V
DD
= 5V
-
120
mV
V
IDL
V
O
= 2.5V, R
L
= 120
, V
DD
= 5V
20
-
mV
Hysteresis (Within V
IDH
, V
IDL
Limits)
V
H
V
O
= 2.5V, R
L
= 120
, V
DD
= 5V
20
-
mV
Propagation Delay
t
P
V
IDH
=120mV, V
DD
= 5V
-
700
ns
Out of Range
V
AX
V
DD
= 5V
3.8
-
V
V
MIN
V
DD
= 5V
-
1.2
V
Quiescent Device Current
I
DD
V
DD
= 0V, V
O
= 2.5V
-10
10
μ
A
Clock Speed
f
OP
V
DD
= 5, R
L
= 120
, C
L
= 25pF
-
TBD
(Note)
MHz
NOTE: Although 1MHz is generally used as an example throughout this datasheet, the maximum speed limit may be higher and depends
upon user’s noise tolerance requirements.
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