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參數(shù)資料
| 型號： | CDP1881CE |
| 廠商： | INTERSIL CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | CMOS 6-Bit Latch and Decoder Memory Interfaces |
| 中文描述： | HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 48K |
| 代理商： | CDP1881CE |
4-5
PROPAGATION DELAY TIMES
Chip Enable to Chip Select
t
CECS
5
-
75
150
-
75
150
ns
10
-
45
100
-
-
-
ns
MRD or MRW to Chip Select (Note 3)
t
MCS
5
-
75
150
-
75
150
ns
10
-
40
100
-
-
-
ns
CLOCK to Chip Select
t
CLCS
5
-
100
175
-
100
175
ns
10
-
65
125
-
-
-
ns
CLOCK to Address
t
CLA
5
-
100
175
-
100
175
ns
10
-
65
125
-
-
-
ns
Memory Address to Chip Select
t
MACS
5
-
100
175
-
100
175
ns
10
-
75
125
-
-
-
ns
Memory Address to Address
t
MAA
5
-
80
125
-
80
125
ns
10
-
40
60
-
-
-
ns
NOTES:
1. Typical values are for T
A
= 25
o
C.
2. Maximum limits of minimum characteristics are the values above which all devices function.
3. For CDP1881C type only.
Dynamic Electrical Specifications
at T
A
= -40
o
C to +85
o
C, V
DD
±
5%, t
R
, t
F
= 20ns, V
IH
= 0.7 V
DD
, V
IL
= 0.3 V
DD
, C
L
= 100pF,
(See Figure 1)
(Continued)
PARAMETER
V
DD
(V)
CDP1882
CDP1881C, CDP1882C
UNITS
MIN
(NOTE 1)
TYP
(NOTE 2)
MAX
MIN
(NOTE 1)
TYP
(NOTE 2)
MAX
FIGURE 3. TIMING WAVEFORMS
CE
CS0, CS1, CS2, CS3
MRD OR MWR
CS0, CS1, CS2, CS3
MA0 - MA5
CLOCK
A8 - A11
VALID CHIP ENABLE
t
CECS
(A) CHIP ENABLE TO CHIP SELECT PROPAGATION DELAY
(B) MRD OR MWR TO CHIP SELECT PROPAGATION DELAY (CDP1881C ONLY)
t
MCS
t
MACL
t
CLMA
t
CLCL
t
CLCS
t
CLA
(C) MEMORY ADDRESS SETUP AND HOLD TIME
t
CECS
t
MCS
t
MACS
t
MACS
t
MAA
t
MAA
CS0, CS1, CS2, CS3
CDP1881C, CDP1882, CDP1882C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CDP1881C | CMOS 6-Bit Latch and Decoder Memory Interfaces(CMOS ６位鎖存和解碼存儲器接口) |
| CDP1882 | CMOS 6-Bit Latch and Decoder Memory Interfaces(CMOS ６位鎖存和解碼存儲器接口) |
| CDP1882C | CMOS 6-Bit Latch and Decoder Memory Interfaces(CMOS ６位鎖存和解碼存儲器接口) |
| CDP1882CEX | CMOS 6-Bit Latch and Decoder Memory Interfaces |
| CDP1882CE | CMOS 6-Bit Latch and Decoder Memory Interfaces |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDP1881CE WAF | 制造商:Harris Corporation 功能描述: |
| CDP1881E | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| CDP1882 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 6-Bit Latch and Decoder Memory Interfaces |
| CDP1882 WAF | 制造商:Harris Corporation 功能描述: |
| CDP1882C | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:CMOS 6-Bit Latch and Decoder Memory Interfaces |
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