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參數(shù)資料
| 型號： | CDP1877E |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 中斷控制器 |
| 英文描述： | Programmable Interrupt Controller (PIC) |
| 中文描述： | CDP1800 SERIES COMPATIBLE, INTERRUPT CONTROLLER, PDIP28 |
| 文件頁數(shù)： | 9/10頁 |
| 文件大小： | 45K |
| 代理商： | CDP1877E |
4-90
Dynamic Electrical Specifications
At T
A
= -40 to +85
o
C, V
DD
±
5%, t
R
, t
F
= 20ns, V
IH
= 0.7V
DD
, V
IL
= 0.3V
DD
, C
L
= 50pF
PARAMETER
V
DD
(V)
LIMITS
UNITS
CDP1877
CDP1877C
MIN
(NOTE 1)
TYP
MAX
MIN
(NOTE 1)
TYP
MAX
Address to TPA Setup Time
t
AS
5
60
-
-
60
-
-
ns
10
40
-
-
-
-
-
ns
Address to TPA Hold Time
t
AH
5
60
-
-
60
-
-
ns
10
40
-
-
-
-
-
ns
Data Valid after TPB
t
DTPB
5
370
-
-
370
-
-
ns
10
210
310
-
-
-
-
ns
Data Hold Time from Write
t
HW
5
30
-
-
30
-
-
ns
10
40
-
-
-
-
-
ns
Address to Valid Data
Access Time
t
DR
5
-
340
490
-
340
490
ns
10
-
125
230
-
-
-
ns
Data Setup Time to Write
t
DSU
5
0
-
-
0
-
-
ns
10
0
-
-
-
-
-
ns
Address Hold from TPB
t
HTPB
5
80
-
-
80
-
-
ns
10
40
-
-
-
-
-
ns
Minimum MWR Pulse Width
t
MWR
5
130
-
-
130
-
-
ns
10
60
-
-
-
-
-
ns
Minimum IR Pulse Width
t
IRX
5
130
-
-
130
-
-
ns
10
60
-
-
-
-
-
ns
NOTE:
1. Typical values are for T
A
= 25
o
C and V
DD
±
5%.
HIGH BYTE
LOW BYTE
t
AH
t
AS
MEMORY ADDRESS
TPA
TPB
MRD
t
HTPB
t
DTPB
t
DR
VALID DATA
DATA FROM PIC TO BUS
MWR
DATA FROM BUS TO PIC
IRX
t
MWR
t
DSU
t
DH
VALID DATA
t
IRX
FIGURE 4. TIMING WAVEFORMS FOR CDP1877
CDP1877, CDP1877C
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