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參數(shù)資料
| 型號： | CDP1855E |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | 8-Bit Programmable Multiply/Divide Unit |
| 中文描述： | 3-BIT, DSP-MULTIPLIER, PDIP28 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大?。?/td> | 85K |
| 代理商： | CDP1855E |
4-49
Recommended Operating Conditions
At T
A
= Full package temperature range. For maximum reliability, operating conditions
should be selected so that operation is always within the following ranges:
PARAMETER
V
DD
(V)
LIMITS
UNITS
CDP1855
CDP1855C
MIN
MAX
MIN
MAX
DC Operating Voltage Range
-
4
10.5
4
6.5
V
Input Voltage Range
-
V
SS
V
DD
V
SS
V
DD
V
Maximum Clock Input Frequency
5
3.2
-
3.2
-
MHz
10
6.4
-
-
-
MHz
Minimum 8 x 8 Multiply (16
÷
8 Divide) Time
5
-
5.6
-
5.6
μ
s
10
-
2.8
-
-
μ
s
FIGURE 2. BLOCK DIAGRAM OF CDP1855 AND CDP1855C
22
BUS
7
21
BUS
6
20
BUS
5
19
BUS
4
18
BUS
3
17
BUS
2
16
BUS
1
15
BUS
0
11
REGISTER
SELECT LOGIC
12
13
1
SELECT CONTROL
SELECT Z
SELECT Y
SELECT X
SELECT STATUS
X SEQUENCE
COUNTER
RESET
OUT
8
CLOCK
26
CN1
27
CN0
8
ADD/
SUBTRACT
X REGISTER
LOAD
8
SHIFT
GENERATOR
Y REGISTER
LOAD
STATUS
REG
8
8
Y SEQUENCE
COUNTER
RESET
OUT
Z SEQUENCE
COUNTER
RESET
OUT
CHIP
NO.
SHIFT
RESET
Z REGISTER
LOAD
8
SHIFT
RESET
25
3
4
5
24
6
23
LOAD
10
7
2
9
C
R
RD/WE
SHIFT
CLEAR
STB
C.I.
CTL.
C.O./O.F.
Y
L
Y
R
Z
L
Z
R
RA2 RA1 RA0
CE
C.O.
14
28 V
DD
V
SS
CDP1855, CDP1855C
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相關(guān)代理商/技術(shù)參數(shù) |
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| CDP1857C DIE | 制造商:Harris Corporation 功能描述: |
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