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參數(shù)資料
| 型號： | CDCV850I |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 2.5-V PHASE LOCK LOOP CLOCK DRIVER WITH 2 LINE SERIAL INTERFACE |
| 中文描述： | 2.5 V的鎖相環(huán)時鐘驅(qū)動器，帶有2線串行接口 |
| 文件頁數(shù)： | 5/15頁 |
| 文件大?。?/td> | 228K |
| 代理商： | CDCV850I |
SCAS647B OCTOBER 2000 REVISED DECEMBER 2002
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIK
Input voltage
All inputs
VDDQ = 2.3 V,
VDDQ = min to max, IOH = –1 mA
VDDQ = 2.3 V,
VDDQ = min to max, IOL = 1 mA
VDDQ = 2.3 V,
VDDI = 3.0 V,
VDDQ = 2.3 V,
VDDQ = 2.3 V,
For load condition see Figure 3
II = –18 mA
–1.2
V
VOH
High-level output voltage
VDDQ – 0.1
V
IOH = –12 mA
1.7
Low-level output
voltage
0.1
VOL
IOL = 12 mA
IOL = 3 mA
VO = 1 V
VO = 1.2 V
0.6
V
SDATA
0.4
IOH
IOL
VO
High-level output current
–18
–32
mA
Low-level output current
26
35
mA
Output voltage swing
1.1
VDDQ – 0.4
V
VOX
Output differential cross
voltage
VDDQ/2 0.2
VDDQ/2
VDDQ/2 + 0.2
V
II
Input current
SDATA,
SCLK
VDDQ = 3.6 V,
VI = 0 V to 3.6 V
+10/50
μ
A
CLK, FBIN
VDDQ = 2.7 V,
VI = 0 V to 2.7 V
±
10
μ
A
IOZ
High-impedance-state output
current
VDDQ = 2.7 V,
VO = VDDQ or GND
±
10
μ
A
IDDPD
Power-down current on VDDQ
+ AVDD
Power down current on VDDI
CLK at 0 MHz;
Σ
of IDD and AIDD
150
250
μ
A
CLK at 0 MHz; VDDQ = 3.6 V
VDDQ = 2.7 V,
All differential output pairs are terminated
with 120
/ CL = 4 pF
AVDD = 2.7 V,
fO = 100 MHz
SCLK and
SDATA = 3.6 V
3
20
μ
A
IDD
Dynamic current on VDDQ
fO = 100 MHz
205
230
mA
AI(DD)
Supply current on AVDD
4
6
mA
IDDI
Supply current on VDDI
VDDI = 3.6 V
1
2
mA
CI
CO
All typical values are at respective nominal VDDQ.
The value of VOC is expected to be |VTR + VCP|/2. In case of each clock directly terminated by a 120-
resistor, where VTR is the true input
signal voltage and VCP is the complementary input signal voltage (see Figure 3).
Input capacitance
VDDQ = 2.5 V
VDDQ = 2.5 V
VI = VDDQ or GND
VO = VDDQ or GND
2
2.5
3
pF
Output capacitance
2.5
3
3.5
pF
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDCV850IDGG | 功能描述:時鐘驅(qū)動器及分配 2.5V Ph Lock Loop Diff Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| CDCV850IDGGG4 | 功能描述:時鐘驅(qū)動器及分配 2.5V Ph Lock Loop Diff Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| CDCV850IDGGR | 功能描述:時鐘驅(qū)動器及分配 2.5V Ph Lock Loop Diff Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| CDCV850IDGGRG4 | 功能描述:時鐘驅(qū)動器及分配 2.5V Ph Lock Loop Diff Clock Driver RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| CDCV855 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.5-V PHASE-LOCK LOOP CLOCK DRIVER |
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