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參數(shù)資料
| 型號(hào)： | CDC913 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | PC Motherboard Clock Sythesizer/Drivers with SDRAM Clock Support(PC母板時(shí)鐘發(fā)生器(帶雙1-4緩沖器和三態(tài)輸出)) |
| 中文描述： | 電腦主板時(shí)鐘Sythesizer / SDRAM時(shí)鐘與支持（電腦母板時(shí)鐘發(fā)生器（帶雙1-4緩沖器和三態(tài)輸出驅(qū)動(dòng)器）） |
| 文件頁數(shù)： | 7/9頁 |
| 文件大?。?/td> | 185K |
| 代理商： | CDC913 |
CDC913
PC MOTHERBOARD CLOCK GENERATOR
WITH DUAL 1-TO-4 BUFFERS AND 3-STATE OUTPUTS
SCAS502C – APRIL 1995 – REVISED MAY 1996
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 15 pF
(see Note A)
LOAD CIRCUIT
S1
VCC
Open
GND
500
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2X VCC
GND
Output Control
(low-level
enabling)
Output
Waveform 1
S1 at VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
1.5 V
1.5 V
VCC
0 V
1.5 V
VOL + 0.3 V
1.5 V
VOH – 0.3 V
≈
0 V
3 V
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
tPLH
tPHL
Output
1.5 V
1.5 V
3 V
0 V
1.5 V
VOH
VOL
Input
0.4 V
2.4 V
tr
tf
0.4 V
2.4 V
500
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≤
10 MHz, ZO = 50
, tr
≤
2.5 ns,
tf
≤
2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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