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參數資料
| 型號： | CD74FCT654M |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | FCT Interface Logic, Octal Bus Transceivers/ Registers, Open Drain (A Side), Three-State (B Side) |
| 中文描述： | 聯邦首都接口邏輯，八路總線收發(fā)器/寄存器，開漏（阿方），三態(tài)（乙方） |
| 文件頁數： | 8/9頁 |
| 文件大?。?/td> | 49K |
| 代理商： | CD74FCT654M |
8-8
FIGURE 4. ENABLE AND DISABLE TIMING
FIGURE 5. PROPAGATION DELAY
NOTES:
11. V
OLP
is measured with respect to a ground reference near the output under test. V
OHV
is measured with respect to V
OH
.
12. Input pulses have the following characteristics:
P
RR
≤
1MHz, t
r
= 2.5ns, t
f
= 2.5ns, skew 1ns.
13. R.F. fixture with 700MHz design rules required. IC should be soldered into test board and bypassed with 0.1
μ
F capacitor. Scope and
probes require 700MHz bandwidth.
FIGURE 6. SIMULTANEOUS SWITCHING TRANSIENT WAVEFORMS
Test Circuits and Waveforms
(Continued)
3V
1.5V
0V
CONTROL INPUT
OUTPUT
NORMALLY LOW
OUTPUT
NORMALLY HIGH
SWITCH
OPEN
t
PZL
3.5V
1.5V
1.5V
0V
t
PLZ
t
PHZ
t
PZH
0V
3.5V
0.3V
0.3V
V
OL
V
OH
SWITCH
CLOSED
ENABLE
DISABLE
1.5V
3V
0V
1.5V
3V
0V
t
PLH
SAME PHASE
INPUT TRANSITION
t
PHL
t
PLH
t
PHL
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
1.5V
V
OL
V
OH
OTHER
OUTPUTS
OUTPUT
UNDER
TEST
V
OH
V
OL
V
OH
V
OHV
V
OLP
V
OL
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