參數(shù)資料
型號: CD74FCT654M
廠商: Texas Instruments, Inc.
英文描述: FCT Interface Logic, Octal Bus Transceivers/ Registers, Open Drain (A Side), Three-State (B Side)
中文描述: 聯(lián)邦首都接口邏輯,八路總線收發(fā)器/寄存器,開漏(阿方),三態(tài)(乙方)
文件頁數(shù): 3/9頁
文件大?。?/td> 49K
代理商: CD74FCT654M
8-3
Functional Diagram
TRUTH TABLE
INPUTS
CAB
H or L
H or L
X
X
X
H or L
H or L
DATA I/O
OPERATION OR FUNCTION
CD74FCT653
Isolation (Note 1)
Store A and B Data
Store A, Hold B
Store A in both registers
Hold A, Store B
Store B in both registers
Real-Time B Data to A Bus
Stored B Data to A Bus
Real-Time A Data to B Bus
Stored A Data to B Bus
Stored A Data to B Bus
Stored B Data to A Bus
OEAB OEBA
L
L
X
H
L
L
L
L
H
H
H
CBA
H or L
H or L
X
H or L
X
X
H or L
SAB
X
X
X
X (3)
X
X
X
X
L
H
H
SBA
X
X
X
X
X
X (3)
L
H
X
X
H
A0 THRU A7
Input
Input
Input
Input
Unspecified (2)
Output
Output
Output
Input
Input
Output
B0 THRU B7
Input
Input
Unspecified (2)
Output
Input
Input
Input
Input
Output
Output
Output
CD74FCT654
Isolation (Note 1)
Store A and B Data
Store A, Hold B
Store A in both registers
Hold A, Store B
Store B in both registers
Real-Time B Data to A Bus
Stored B Data to A Bus
Real-Time A Data to B Bus
Stored A Data to B Bus
Stored A Data to B Bus
Stored B Data to A Bus
H
H
H
H
X
L
L
L
H
H
L
NOTES:
1. To prevent excess currents in the High-Z (isolation) modes, all I/O terminals should be terminated with 10k
to 1M
resistors.
2. The data output functions may be enabled or disabled by various signals at the OEAB or OEBA inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every low-to-high transition on the clock inputs.
3. Select control = L; clocks can occur simultaneously. Select control = H; clocks must be staggered in order to load both registers.
4
5
6
7
8
9
10
11
20
19
18
17
16
15
14
13
B0
B1
B2
B3
B4
B5
B6
B7
A0
A1
A2
A3
A4
A5
A6
A7
B DATA PORT
A DATA PORT
OEBA
OEAB
CAB CLOCK
CBA CLOCK
21
3
1
23
2
22
SAB SOURCE
SBA SOURCE
DATA SOURCE
SELECTION
INPUTS
FLIP-FLOP
CLOCKS
GND = PIN 12
V
CC
= PIN 24
CD74FCT653, CD74FCT654
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