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參數(shù)資料
| 型號： | CD4029BMS |
| 廠商： | Intersil Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | CMOS Presettable Up/Down Counter(CMOS可預置加/減計數(shù)器) |
| 中文描述： | 的CMOS可預置加/減計數(shù)器的CMOS（可預置加/減計數(shù)器） |
| 文件頁數(shù)： | 10/11頁 |
| 文件大?。?/td> | 124K |
| 代理商： | CD4029BMS |
807
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
http://www.intersil.com
Timing Diagrams
(Continued)
FIGURE 12. TIMING DIAGRAM-DECADE MODE
FIGURE 13. CASCADING COUNTER PACKAGES
0
1
2
3
4
5
6
7
8
9
8
7
6
5
4
3
2
1
0
0
9
8
7
CLOCK (CL)
CARRY IN
(CL ENABLE)
UP/DOWN
BINARY/
DECADE
PRESET
ENABLE
J1
J2
J3
J4
Q1
Q2
Q3
Q4
CARRY OUT
COUNT
*
CARRY OUT LINES AT THE 2ND, 3RD, ETC, STAGES MAY HAVE A NEG-
ATIVE-GOING GLITCH PULSE RESULTING FROM DIFFERENTIAL
DELAYS OF DIFFERENT CD4029BMS IC’S. THESE NEGATIVE GOING
GLITCHES DO NOT AFFECT PROPER CD4029BMS OPERATION. HOW-
EVER, IF THE CARRY OUT SIGNALS ARE USED TO TRIGGER OTHER
EDGE-SENSITIVE LOGIC DEVICES, SUCH AS FF’S OR COUNTERS, THE
CARRY OUT SIGNALS SHOULD BE GATED WITH THE CLOCK SIGNAL
USING A 2-INPUT OR GATE SUCH AS CD4071BMS.
UP/D
B/D
PE
CL Q1 Q2 Q3 Q4
CI
CO
J1 J2 J3 J4
CD4029
UP/D
B/D
PE
CL Q1 Q2 Q3 Q4
CI
CO
J1 J2 J3 J4
CD4029
UP/D
B/D
PE
CL Q1 Q2 Q3 Q4
CI
CO
J1 J2 J3 J4
CD4029
*
UP/DOWN
PRESET
ENABLE
CLOCK
BINARY/
DECADE
“PARALLEL CLOCKING”
CD4029BMS
相關PDF資料 |
PDF描述 |
|---|---|
| CD4029 | CMOS PRESETTABLE UP/DOWN COUNTER |
| CD4029BH(SMD) | CMOS PRESETTABLE UP/DOWN COUNTER |
| CD4029BE(DIP) | CMOS PRESETTABLE UP/DOWN COUNTER |
| CD4029 | Presettable Binary/Decade Up/Down Counter |
| CD4029BCJ | Presettable Binary/Decade Up/Down Counter |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CD4029BMT | 功能描述:計數(shù)器 IC CMOS Presettable Up/Down Counter RoHS:否 制造商:NXP Semiconductors 計數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計數(shù)法: 計數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4029BMTE4 | 功能描述:計數(shù)器 IC CMOS Presettable Up/Down Counter RoHS:否 制造商:NXP Semiconductors 計數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計數(shù)法: 計數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4029BMTG4 | 功能描述:計數(shù)器 IC CMOS Presettable Up/Down Counter RoHS:否 制造商:NXP Semiconductors 計數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計數(shù)法: 計數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| CD4029BNS | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| CD4029BNSR | 功能描述:計數(shù)器 IC CMOS Presettable Up/Down Counter RoHS:否 制造商:NXP Semiconductors 計數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計數(shù)法: 計數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
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