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參數(shù)資料
| 型號： | CD3206BB |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 9-bit latched/registered/pass-thru Futurebus transceiver |
| 中文描述： | FB SERIES, 9-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PQFP52 |
| 封裝： | PLASTIC, QFP-52 |
| 文件頁數(shù)： | 14/18頁 |
| 文件大小： | 187K |
| 代理商： | CD3206BB |
Philips Semiconductors
Product specification
FB2031
9-bit latched/registered/pass-thru Futurebus+ transceiver
1995 May 25
14
AC WAVEFORMS
íí
íí
t
h
V
M
t
s
t
PZL
Input
Output
V
M
V
M
V
M
t
PHL
V
M
t
PLH
V
M
V
M
V
M
V
M
t
PHL
t
PLH
Output
An, Bn
An, Bn
V
M
V
M
t
SK
(o)
An
OEA
V
M
V
M
t
PLZ
V
M
V
OL
+0.3V
An
OEA
V
M
V
M
V
M
V
OH
-0.3V
OV
t
PHZ
t
PZH
NOTE:
V
M
= 1.55V for Bn, V
M
= 1.5V for all others.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Input
íí
íí
íííí
íííí
t
h
An, Bn
LCAB, LCBA
V
M
V
M
1/f
MAX
t
s
t
w
(L)
t
w
(H)
Waveform 1. Propagation Delay for Data
or Output Enable to Output
Waveform 2. Propagation Delay for Data
or Output Enable to Output
Waveform 3. Output to Output Skew
Waveform 4. Setup and Hold Times,
Pulse Widths and Maximum Frequency
Waveform 5. 3-State Output Enable Time to High Level
and Output Disable Time from High Level
Waveform 6. 3-State Output Enable Time to Low Level
and Output Disable Time from Low Level
t
w
(input)
t
w
(output)
SG00062
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