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| 型號(hào)： | CB55000 |
| 英文描述： | HCMOS7 STANDARD CELLS |
| 中文描述： | HCMOS7標(biāo)準(zhǔn)單元 |
| 文件頁(yè)數(shù)： | 14/15頁(yè) |
| 文件大?。?/td> | 2533K |
| 代理商： | CB55000 |
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CB55000 Series
14/15
8.2 3.3 V Buffer Specifications
The 3.3 V buffers comply with the JEDEC standard 8-A (June, 1994). They are also compatible with the 74VCX
DC specifications for 2.7 V to 3.6 V operation. These buffers are called “TTL”, however they also comply with
Low Voltage CMOS levels. For all buffers, V
dd
(min) = 2.25 V and V
dd
(max) = 2.75 V (core supply).
Table 11. LVTTL and LVCMOS DC Input Specifications (2.7 V < V
dd3
< 3.6 V)
Table 12. LVTTL DC Output Specifications (3.0 V < V
dd3
< 3.6 V)
Table 13. LVCMOS DC Output Specifications (2.7 V < V
dd3
< 3.6 V)
Table 14. Slew Rate Versus Drive
Symbol
Parameter
Conditions
Min.
Type
Max
Unit
V
il
Low level input voltage
0.8
V
V
ih
High level input voltage
2.0
V
V
ilhyst
Low level threshold
(input falling)
0.8
1.35
V
V
ihhyst
High level threshold
(input rising)
1.3
2.0
V
V
hyst
Schmitt trigger hysteresis
0.3
0.8
V
Symbol
Parameter
Conditions
Min.
Type
Max
Unit
V
ol
Low level input voltage
1,2
1)
2)
3)
The output buffers are functional at V
dd3
= 2.7 V, but the above specifications are not guaranteed at this voltage.
Takes into account a 200 mV voltage drop in both supply lines.
“X” is the source/sink current under worst case conditions and is reflected in the name of the I/O cell according to the drive
capability.
I
ol
= X mA
3
0.4
V
V
oh
High level input voltage
1,2
I
oh
= -X mA
3
2.4
V
Symbol
Parameter
Conditions
Min.
Type
Max
Unit
V
ol
Low level input voltage
I
ol
= 100
μ
A
0.2
V
V
oh
High level input voltage
I
oh
= -100
μ
A
V
dd3
- 0.2
V
Drive (mA):
2
4
8
Slew Rate
(mA/ns Typical)
8
16
32
Typical peak current
(mA)
25
50
100
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