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參數(shù)資料
| 型號： | CA91 |
| 廠商： | Fujitsu Limited |
| 英文描述： | CMOS AccelArray |
| 中文描述： | 的CMOS AccelArray |
| 文件頁數(shù)： | 7/8頁 |
| 文件大?。?/td> | 97K |
| 代理商： | CA91 |
CA91 Series
7
■
FRAME LINE UP
2 groups are provided depending on the I/O transmission speed: Mega Frame (400 Mbps) and Giga Frame
(622 Mbps to 3.125 Gbps).
Mega Frame Line Up
*1 : Actual available I/O count varies with the interface type.
*2 : ARM9 core is supported.
Giga Frame Line Up (including frames under planning)
Frame name
4 channels G-phy (Tx
+
Rx)
S-phy (Tx
+
Rx)
I/O cell count (excluding high-speed IF) *
FF cell count (
×
1000)
Available gate count (
×
1000)
ASIC equivalent gate count (
×
1000)
* : Actual available I/O count varies with the interface type.
■
PACKAGE
High pin count FC-BGAs using fine solder bump pitch technology are available for high speed data networking
applications.
Frame name
M20
M30
M40
M50
M52
A50
*
2
I/O cell count *
1
FF cell count (
×
1000)
Available gate count (
×
1000)
ASIC equivalent gate count (
×
1000)
696
824
952
1176
1176
1176
50
70
93
150
233
186
720
1008
1344
2160
3689
2872
1219
1707
2276
3658
6019
4736
SRAM size (Kbits)
2RW-SRAM
1680
2240
2880
4400
2400
2960
1R/1W-SRAM
90
105
120
150
150
150
Total (Max)
1770
2345
3000
4550
2550
3110
PLL macro count
8
8
8
8
8
8
Package
(The value inside [ ] is
body size, Ball pitch
1.00 mm)
FC-BGA729 [29 mm sq.]
FC-BGA961 [33 mm sq.]
FC-BGA1156 [35 mm sq.]
FC-BGA1681 [42.5 mm sq.]
G30
G40
G45
G50
G55
3
4
2
6
2
0
0
2
0
2
612
688
554
864
760
69
93
93
206
149
1007
1343
1343
3133
2158
1706
2275
2275
5196
3656
SRAM size (Kbits)
2RW-SRAM
1960
2560
2560
3040
4000
1R/1W-SRAM
45
52
52
75
67
Total (Max)
2005
2612
2612
3115
4067
PLL macro count
8
8
8
8
8
Package
(The value inside [ ] is body
size, Ball pitch 1.00 mm)
FC-BGA961 [33 mm sq.]
FC-BGA1156 [35 mm sq.]
FC-BGA1681 [42.5 mm sq.]
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