- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗3794 > C8051F587-IM (Silicon Laboratories Inc)IC 8051 MCU 96K FLASH 32-QFN PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | C8051F587-IM |
| 寤犲晢锛� | Silicon Laboratories Inc |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 304/356闋�(y猫) |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC 8051 MCU 96K FLASH 32-QFN |
| 鎳�(y墨ng)鐢ㄨ鏄庯細 | LIN Bootloader AppNote |
| 鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� | Serial Communication Overview |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 73 |
| 绯诲垪锛� | C8051F58x |
| 鏍稿績铏曠悊鍣細 | 8051 |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 50MHz |
| 閫ｉ€氭€э細 | SMBus锛�2 绶�/I²C锛�锛孲PI锛孶ART/USART |
| 澶栧湇瑷�(sh猫)鍌欙細 | POR锛孭WM锛屾韩搴﹀偝鎰熷櫒锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 25 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 | 96KB锛�96K x 8锛� |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | 闁冨瓨 |
| RAM 瀹归噺锛� | 8.25K x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 1.8 V ~ 5.25 V |
| 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� | A/D 25x12b |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 125°C |
| 灏佽/澶栨锛� | 32-VFQFN 瑁搁湶鐒婄洡 |
| 鍖呰锛� | 绠′欢 |
| 鍏跺畠鍚嶇ū锛� | 336-1579-5 |
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Rev. 1.2
51
C8051F58x/F59x
Table 5.9. ADC0 Electrical Characteristics
VDDA = 1.8 to 2.75 V, 鈥�40 to +125 掳C, VREF = 1.5 V (REFSL=0) unless otherwise specified.
Parameter
Conditions
Min
Typ
Max
Units
DC Accuracy
Resolution
12
bits
Integral Nonlinearity
鈥�
卤0.5
卤3
LSB
Differential Nonlinearity
Guaranteed Monotonic
鈥�
卤0.5
卤1
LSB
Offset Error1
鈥�10
鈥�1.6
10
LSB
Full Scale Error
鈥�20
鈥�4.2
20
LSB
Offset Temperature Coefficient
鈥�
鈥�2
鈥�
ppm/掳C
Dynamic performance (10 kHz sine-wave single-ended input, 1 dB below Full Scale, 200 ksps)
Signal-to-Noise Plus Distortion
63
66
鈥�
dB
Total Harmonic Distortion
Up to the 5th harmonic
鈥�
81
鈥�
dB
Spurious-Free Dynamic Range
鈥�
鈥�82
鈥�
dB
Conversion Rate
SAR Conversion Clock
鈥�
3.6
MHz
Conversion Time in SAR Clocks2
13
鈥�
clocks
Track/Hold Acquisition Time3
VDDA >2.0 V
VDDA < 2.0 V
1.5
3.5
鈥�
s
Throughput Rate4
VDDA >2.0 V
鈥�
200
ksps
Analog Inputs
ADC Input Voltage Range5
gain = 1.0 (default)
gain = n
0
鈥�
VREF
VREF / n
V
Absolute Pin Voltage with respect
to GND
0
鈥�
VIO
V
Sampling Capacitance
鈥�
29
鈥�
pF
Input Multiplexer Impedance
鈥�
5
鈥�
k
Power Specifications
Power Supply Current
(VDDA supplied to ADC0)
Operating Mode, 200 ksps
鈥�
1100
1500
A
Burst Mode (Idle)
鈥�
1100
1500
A
Power-On Time
5
鈥�
s
Power Supply Rejection Ratio
鈥�
鈥�60
鈥�
mV/V
Notes:
1. Represents one standard deviation from the mean. Offset and full-scale error can be removed through
calibration.
2. An additional 2 FCLK cycles are required to start and complete a conversion
3. Additional tracking time may be required depending on the output impedance connected to the ADC input.
See Section 鈥�
4. An increase in tracking time will decrease the ADC throughput.
5. See Section 鈥�
6.3. Selectable Gain鈥� on page 60 for more information about the setting the gain.
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| C8051F587-IMR | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 50 MIPS 96 kB 8 kB SPI 2xUART RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| C8051F587-IQ | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 50MIPS 96kB 8kB SPI 2xUART I2C RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| C8051F587-IQR | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 50 MIPS 96 kB 8 kB SPI 2xUART RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| C8051F588-IM | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 50MIPS128kB 8kB CAN2 LIN2.1SPI 2xUART I2C RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| C8051F588-IMR | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 50 MIPS 128 kB 8 kB CAN2.0 LIN 2.1 SPI RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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